Lines Matching +full:0 +full:x1d0
31 pinctrl-0 = <&pinctrl_i2c1>;
39 pinctrl-0 = <&pinctrl_pmic>;
40 reg = <0x25>;
119 pinctrl-0 = <&pinctrl_usdhc3>;
128 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
129 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
135 MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x41
141 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
142 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
143 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
144 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
145 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
146 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
147 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
148 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
149 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
150 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
151 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
157 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
158 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
159 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
160 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
161 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
162 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
163 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
164 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
165 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
166 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
167 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
173 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
174 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
175 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
176 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
177 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
178 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
179 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
180 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
181 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
182 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
183 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196