Lines Matching +full:gain +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
7 #include <dt-bindings/pwm/pwm.h>
9 #include "imx8mm-overdrive.dtsi"
13 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 brightness-levels = <0 45 63 88 119 158 203 255>;
24 default-brightness-level = <4>;
26 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
29 power-supply = <®_3p3v>;
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <40000000>;
42 gpio-keys {
43 compatible = "gpio-keys";
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_gpio_keys>;
47 key-wakeup {
48 debounce-interval = <10>;
50 gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
51 label = "Wake-Up";
53 wakeup-source;
57 hdmi_connector: hdmi-connector {
58 compatible = "hdmi-connector";
59 ddc-i2c-bus = <&i2c2>;
61 hpd-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_pwm_3_dsi_hpd_gpio>;
69 panel_lvds: panel-lvds {
70 compatible = "panel-lvds";
72 data-mapping = "vesa-24";
77 reg_1p8v: regulator-1p8v {
78 compatible = "regulator-fixed";
79 regulator-max-microvolt = <1800000>;
80 regulator-min-microvolt = <1800000>;
81 regulator-name = "+V1.8_SW";
84 reg_3p3v: regulator-3p3v {
85 compatible = "regulator-fixed";
86 regulator-max-microvolt = <3300000>;
87 regulator-min-microvolt = <3300000>;
88 regulator-name = "+V3.3_SW";
91 reg_5p0v: regulator-5p0v {
92 compatible = "regulator-fixed";
93 regulator-max-microvolt = <5000000>;
94 regulator-min-microvolt = <5000000>;
95 regulator-name = "+V5_SW";
98 /* Non PMIC On-module Supplies */
99 reg_ethphy: regulator-ethphy {
100 compatible = "regulator-fixed";
101 enable-active-high;
103 off-on-delay-us = <500000>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_reg_eth>;
106 regulator-always-on;
107 regulator-boot-on;
108 regulator-max-microvolt = <3300000>;
109 regulator-min-microvolt = <3300000>;
110 regulator-name = "On-module +V3.3_ETH";
111 startup-delay-us = <200000>;
120 reg_force_sleep_moci: regulator-force-sleep-moci {
121 compatible = "regulator-fixed";
122 enable-active-high;
125 regulator-always-on;
126 regulator-boot-on;
127 regulator-name = "CTRL_SLEEP_MOCI#";
130 reg_usb_otg1_vbus: regulator-usb-otg1 {
131 compatible = "regulator-fixed";
132 enable-active-high;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_reg_usb1_en>;
137 regulator-max-microvolt = <5000000>;
138 regulator-min-microvolt = <5000000>;
139 regulator-name = "USB_1_EN";
142 reg_usb_otg2_vbus: regulator-usb-otg2 {
143 compatible = "regulator-fixed";
144 enable-active-high;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_reg_usb2_en>;
149 regulator-max-microvolt = <5000000>;
150 regulator-min-microvolt = <5000000>;
151 regulator-name = "USB_2_EN";
154 reg_usdhc2_vmmc: regulator-usdhc2 {
155 compatible = "regulator-fixed";
156 enable-active-high;
159 off-on-delay-us = <100000>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
162 regulator-max-microvolt = <3300000>;
163 regulator-min-microvolt = <3300000>;
164 regulator-name = "+V3.3_SD";
165 startup-delay-us = <2000>;
168 reserved-memory {
169 #address-cells = <2>;
170 #size-cells = <2>;
174 /delete-node/ linux,cma;
179 cpu-supply = <®_vdd_arm>;
183 cpu-supply = <®_vdd_arm>;
187 cpu-supply = <®_vdd_arm>;
191 cpu-supply = <®_vdd_arm>;
203 operating-points-v2 = <&ddrc_opp_table>;
205 ddrc_opp_table: opp-table {
206 compatible = "operating-points-v2";
208 opp-25000000 {
209 opp-hz = /bits/ 64 <25000000>;
212 opp-100000000 {
213 opp-hz = /bits/ 64 <100000000>;
216 opp-750000000 {
217 opp-hz = /bits/ 64 <750000000>;
224 #address-cells = <1>;
225 #size-cells = <0>;
226 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_ecspi2>;
231 /* On-module SPI */
233 #address-cells = <1>;
234 #size-cells = <0>;
235 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>, <&gpio4 19 GPIO_ACTIVE_LOW>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_ecspi3>, <&pinctrl_tpm_spi_cs>;
244 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_can1_int>;
248 spi-max-frequency = <8500000>;
252 compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
254 spi-max-frequency = <36000000>;
258 /* Verdin ETH_1 (On-module PHY) */
260 fsl,magic-packet;
261 phy-handle = <ðphy0>;
262 phy-mode = "rgmii-id";
263 phy-supply = <®_ethphy>;
264 pinctrl-names = "default", "sleep";
265 pinctrl-0 = <&pinctrl_fec1>;
266 pinctrl-1 = <&pinctrl_fec1_sleep>;
269 #address-cells = <1>;
270 #size-cells = <0>;
272 ethphy0: ethernet-phy@7 {
273 compatible = "ethernet-phy-ieee802.3-c22";
274 interrupt-parent = <&gpio1>;
276 micrel,led-mode = <0>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_flexspi0>;
289 gpio-line-names = "SODIMM_216",
308 gpio-line-names = "",
330 gpio-line-names = "SODIMM_131",
362 /* On-module I2C */
364 clock-frequency = <400000>;
365 pinctrl-names = "default", "gpio";
366 pinctrl-0 = <&pinctrl_i2c1>;
367 pinctrl-1 = <&pinctrl_i2c1_gpio>;
368 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
369 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
374 interrupt-parent = <&gpio1>;
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_pmic>;
388 nxp,dvs-run-voltage = <850000>;
389 nxp,dvs-standby-voltage = <800000>;
390 regulator-always-on;
391 regulator-boot-on;
392 regulator-max-microvolt = <850000>;
393 regulator-min-microvolt = <800000>;
394 regulator-name = "On-module +VDD_SOC (BUCK1)";
395 regulator-ramp-delay = <3125>;
399 nxp,dvs-run-voltage = <950000>;
400 nxp,dvs-standby-voltage = <850000>;
401 regulator-always-on;
402 regulator-boot-on;
403 regulator-max-microvolt = <1050000>;
404 regulator-min-microvolt = <805000>;
405 regulator-name = "On-module +VDD_ARM (BUCK2)";
406 regulator-ramp-delay = <3125>;
410 regulator-always-on;
411 regulator-boot-on;
412 regulator-max-microvolt = <1000000>;
413 regulator-min-microvolt = <805000>;
414 regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";
418 regulator-always-on;
419 regulator-boot-on;
420 regulator-max-microvolt = <3300000>;
421 regulator-min-microvolt = <3300000>;
422 regulator-name = "On-module +V3.3 (BUCK4)";
426 regulator-always-on;
427 regulator-boot-on;
428 regulator-max-microvolt = <1800000>;
429 regulator-min-microvolt = <1800000>;
430 regulator-name = "PWR_1V8_MOCI (BUCK5)";
434 regulator-always-on;
435 regulator-boot-on;
436 regulator-max-microvolt = <1100000>;
437 regulator-min-microvolt = <1100000>;
438 regulator-name = "On-module +VDD_DDR (BUCK6)";
442 regulator-always-on;
443 regulator-boot-on;
444 regulator-max-microvolt = <1800000>;
445 regulator-min-microvolt = <1800000>;
446 regulator-name = "On-module +V1.8_SNVS (LDO1)";
450 regulator-always-on;
451 regulator-boot-on;
452 regulator-max-microvolt = <800000>;
453 regulator-min-microvolt = <800000>;
454 regulator-name = "On-module +V0.8_SNVS (LDO2)";
458 regulator-always-on;
459 regulator-boot-on;
460 regulator-max-microvolt = <1800000>;
461 regulator-min-microvolt = <1800000>;
462 regulator-name = "On-module +V1.8A (LDO3)";
466 regulator-always-on;
467 regulator-boot-on;
468 regulator-max-microvolt = <900000>;
469 regulator-min-microvolt = <900000>;
470 regulator-name = "On-module +V0.9_MIPI (LDO4)";
474 regulator-max-microvolt = <3300000>;
475 regulator-min-microvolt = <1800000>;
476 regulator-name = "On-module +V3.3_1.8_SD (LDO5)";
489 #address-cells = <1>;
490 #size-cells = <0>;
492 /* Verdin I2C_1 (ADC_4 - ADC_3) */
496 ti,gain = <2>;
499 /* Verdin I2C_1 (ADC_4 - ADC_1) */
503 ti,gain = <2>;
506 /* Verdin I2C_1 (ADC_3 - ADC_1) */
510 ti,gain = <2>;
513 /* Verdin I2C_1 (ADC_2 - ADC_1) */
517 ti,gain = <2>;
524 ti,gain = <2>;
531 ti,gain = <2>;
538 ti,gain = <2>;
545 ti,gain = <2>;
558 clock-frequency = <400000>;
559 pinctrl-names = "default", "gpio";
560 pinctrl-0 = <&pinctrl_i2c2>;
561 pinctrl-1 = <&pinctrl_i2c2_gpio>;
562 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
563 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
571 clock-frequency = <400000>;
572 pinctrl-names = "default", "gpio";
573 pinctrl-0 = <&pinctrl_i2c3>;
574 pinctrl-1 = <&pinctrl_i2c3_gpio>;
575 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
576 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
581 clock-frequency = <400000>;
582 pinctrl-names = "default", "gpio";
583 pinctrl-0 = <&pinctrl_i2c4>;
584 pinctrl-1 = <&pinctrl_i2c4_gpio>;
585 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
586 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
588 gpio_expander_21: gpio-expander@21 {
590 #gpio-cells = <2>;
591 gpio-controller;
593 vcc-supply = <®_3p3v>;
601 enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_gpio_10_dsi>;
612 shunt-resistor = <10000>;
618 pinctrl-names = "default";
619 pinctrl-0 = <&pinctrl_gpio_10_dsi>;
623 reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
633 interrupt-parent = <&gpio3>;
635 pinctrl-names = "default";
636 pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
639 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
669 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
671 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
673 assigned-clock-rates = <10000000>, <250000000>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_pcie0>;
677 reset-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
682 clock-names = "ref";
683 fsl,clkreq-unsupported;
684 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
685 fsl,tx-deemph-gen1 = <0x2d>;
686 fsl,tx-deemph-gen2 = <0xf>;
691 pinctrl-names = "default";
692 pinctrl-0 = <&pinctrl_pwm_1>;
693 #pwm-cells = <3>;
698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_pwm_2>;
700 #pwm-cells = <3>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&pinctrl_pwm_3>;
707 #pwm-cells = <3>;
712 #sound-dai-cells = <0>;
713 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
714 assigned-clock-rates = <24576000>;
715 assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
716 pinctrl-names = "default";
717 pinctrl-0 = <&pinctrl_sai2>;
726 pinctrl-names = "default";
727 pinctrl-0 = <&pinctrl_uart1>;
732 pinctrl-names = "default";
733 pinctrl-0 = <&pinctrl_uart2>;
734 uart-has-rtscts;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_uart3>;
741 uart-has-rtscts;
746 * Resource allocated to M4 by default, must not be accessed from Cortex-A35 or you get an OOPS
749 pinctrl-names = "default";
750 pinctrl-0 = <&pinctrl_uart4>;
755 adp-disable;
757 hnp-disable;
758 samsung,picophy-dc-vol-level-adjust = <7>;
759 samsung,picophy-pre-emp-curr-control = <3>;
760 srp-disable;
761 vbus-supply = <®_usb_otg1_vbus>;
767 samsung,picophy-dc-vol-level-adjust = <7>;
768 samsung,picophy-pre-emp-curr-control = <3>;
769 vbus-supply = <®_usb_otg2_vbus>;
773 vcc-supply = <®_vdd_3v3>;
777 power-domains = <&pgc_otg2>;
778 vcc-supply = <®_vdd_3v3>;
781 /* On-module eMMC */
783 bus-width = <8>;
784 keep-power-in-suspend;
785 non-removable;
786 pinctrl-names = "default", "state_100mhz", "state_200mhz";
787 pinctrl-0 = <&pinctrl_usdhc1>;
788 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
789 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
795 bus-width = <4>;
796 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
797 disable-wp;
798 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
799 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>;
800 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
801 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
802 pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;
803 vmmc-supply = <®_usdhc2_vmmc>;
807 fsl,ext-reset-output;
808 pinctrl-names = "default";
809 pinctrl-0 = <&pinctrl_wdog>;
814 pinctrl-names = "default";
815 pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
871 pinctrl_fec1_sleep: fec1-sleepgrp {
942 /* Verdin GPIO_9_DSI (pulled-up as active-low) */
948 /* Verdin GPIO_10_DSI (pulled-up as active-low) */
989 /* On-module I2C */
1081 /* Verdin PWM_3_DSI (pulled-down as active-high) shared with PWM1_OUT */
1178 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
1194 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
1226 * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the
1227 * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.
1240 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
1251 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
1275 * On-module Wi-Fi/BT or type specific SDHC interface
1288 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
1298 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {