Lines Matching +full:mac +full:- +full:divider
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
27 stdout-path = &uart2;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <20000000>;
39 clock-output-names = "can20m";
42 gpio-keys {
43 compatible = "gpio-keys";
45 key-user-pb {
51 key-user-pb1x {
54 interrupt-parent = <&gsc>;
58 key-erased {
61 interrupt-parent = <&gsc>;
65 key-eeprom-wp {
68 interrupt-parent = <&gsc>;
72 key-tamper {
75 interrupt-parent = <&gsc>;
79 switch-hold {
82 interrupt-parent = <&gsc>;
87 led-controller {
88 compatible = "gpio-leds";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_gpio_leds>;
92 led-0 {
97 default-state = "off";
100 led-1 {
105 default-state = "off";
108 led-2 {
113 default-state = "off";
116 led-3 {
121 default-state = "off";
124 led-4 {
129 default-state = "off";
133 pcie0_refclk: pcie0-refclk {
134 compatible = "fixed-clock";
135 #clock-cells = <0>;
136 clock-frequency = <100000000>;
140 compatible = "pps-gpio";
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_pps>;
147 reg_3p3v: regulator-3p3v {
148 compatible = "regulator-fixed";
149 regulator-name = "3P3V";
150 regulator-min-microvolt = <3300000>;
151 regulator-max-microvolt = <3300000>;
152 regulator-always-on;
155 reg_usb1_vbus: regulator-usb1 {
156 compatible = "regulator-fixed";
157 pinctrl-names = "default";
158 pinctrl-0 = <&pinctrl_reg_usb1>;
159 regulator-name = "usb_usb1_vbus";
161 enable-active-high;
162 regulator-min-microvolt = <5000000>;
163 regulator-max-microvolt = <5000000>;
166 reg_wifi: regulator-wifi {
167 compatible = "regulator-fixed";
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_reg_wl>;
170 regulator-name = "wifi";
172 enable-active-high;
173 startup-delay-us = <100>;
174 regulator-min-microvolt = <3300000>;
175 regulator-max-microvolt = <3300000>;
180 cpu-supply = <&buck2>;
184 cpu-supply = <&buck2>;
188 cpu-supply = <&buck2>;
192 cpu-supply = <&buck2>;
196 operating-points-v2 = <&ddrc_opp_table>;
198 ddrc_opp_table: opp-table {
199 compatible = "operating-points-v2";
201 opp-25000000 {
202 opp-hz = /bits/ 64 <25000000>;
205 opp-100000000 {
206 opp-hz = /bits/ 64 <100000000>;
209 opp-750000000 {
210 opp-hz = /bits/ 64 <750000000>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_spi1>;
218 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
225 interrupt-parent = <&gpio2>;
227 spi-max-frequency = <10000000>;
231 /* off-board header */
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_spi2>;
235 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_fec1>;
242 phy-mode = "rgmii-id";
243 phy-handle = <ðphy0>;
244 local-mac-address = [00 00 00 00 00 00];
248 #address-cells = <1>;
249 #size-cells = <0>;
251 ethphy0: ethernet-phy@0 {
252 compatible = "ethernet-phy-ieee802.3-c22";
254 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
255 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
256 tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
257 rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
263 gpio-line-names = "", "", "", "", "", "", "", "",
270 gpio-line-names = "", "", "", "", "", "", "", "",
277 gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#",
284 gpio-line-names = "", "", "", "", "", "", "", "",
293 gpio-line-names = "", "", "", "mipi_gpio4",
301 clock-frequency = <100000>;
302 pinctrl-names = "default", "gpio";
303 pinctrl-0 = <&pinctrl_i2c1>;
304 pinctrl-1 = <&pinctrl_i2c1_gpio>;
305 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
306 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
312 pinctrl-0 = <&pinctrl_gsc>;
313 interrupt-parent = <&gpio2>;
315 interrupt-controller;
316 #interrupt-cells = <1>;
317 #address-cells = <1>;
318 #size-cells = <0>;
321 compatible = "gw,gsc-adc";
322 #address-cells = <1>;
323 #size-cells = <0>;
341 gw,voltage-divider-ohms = <22100 1000>;
342 gw,voltage-offset-microvolt = <700000>;
349 gw,voltage-divider-ohms = <10000 10000>;
356 gw,voltage-divider-ohms = <10000 10000>;
399 gw,voltage-divider-ohms = <10000 10000>;
406 gw,voltage-divider-ohms = <10000 10000>;
413 gw,voltage-divider-ohms = <10000 10000>;
421 gpio-controller;
422 #gpio-cells = <2>;
423 interrupt-parent = <&gsc>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&pinctrl_pmic>;
432 interrupt-parent = <&gpio3>;
434 rohm,reset-snvs-powered;
435 #clock-cells = <0>;
437 clock-output-names = "clk-32k-out";
440 /* vdd_soc: 0.805-0.900V (typ=0.8V) */
442 regulator-name = "buck1";
443 regulator-min-microvolt = <700000>;
444 regulator-max-microvolt = <1300000>;
445 regulator-boot-on;
446 regulator-always-on;
447 regulator-ramp-delay = <1250>;
450 /* vdd_arm: 0.805-1.0V (typ=0.9V) */
452 regulator-name = "buck2";
453 regulator-min-microvolt = <700000>;
454 regulator-max-microvolt = <1300000>;
455 regulator-boot-on;
456 regulator-always-on;
457 regulator-ramp-delay = <1250>;
458 rohm,dvs-run-voltage = <1000000>;
459 rohm,dvs-idle-voltage = <900000>;
462 /* vdd_0p9: 0.805-1.0V (typ=0.9V) */
464 regulator-name = "buck3";
465 regulator-min-microvolt = <700000>;
466 regulator-max-microvolt = <1350000>;
467 regulator-boot-on;
468 regulator-always-on;
473 regulator-name = "buck4";
474 regulator-min-microvolt = <3000000>;
475 regulator-max-microvolt = <3300000>;
476 regulator-boot-on;
477 regulator-always-on;
482 regulator-name = "buck5";
483 regulator-min-microvolt = <1605000>;
484 regulator-max-microvolt = <1995000>;
485 regulator-boot-on;
486 regulator-always-on;
491 regulator-name = "buck6";
492 regulator-min-microvolt = <800000>;
493 regulator-max-microvolt = <1400000>;
494 regulator-boot-on;
495 regulator-always-on;
500 regulator-name = "ldo1";
501 regulator-min-microvolt = <1600000>;
502 regulator-max-microvolt = <1900000>;
503 regulator-boot-on;
504 regulator-always-on;
509 regulator-name = "ldo2";
510 regulator-min-microvolt = <800000>;
511 regulator-max-microvolt = <900000>;
512 regulator-boot-on;
513 regulator-always-on;
518 regulator-name = "ldo3";
519 regulator-min-microvolt = <1800000>;
520 regulator-max-microvolt = <3300000>;
521 regulator-boot-on;
522 regulator-always-on;
526 regulator-name = "ldo4";
527 regulator-min-microvolt = <900000>;
528 regulator-max-microvolt = <1800000>;
529 regulator-boot-on;
530 regulator-always-on;
534 regulator-name = "ldo6";
535 regulator-min-microvolt = <900000>;
536 regulator-max-microvolt = <1800000>;
537 regulator-boot-on;
538 regulator-always-on;
574 clock-frequency = <400000>;
575 pinctrl-names = "default", "gpio";
576 pinctrl-0 = <&pinctrl_i2c2>;
577 pinctrl-1 = <&pinctrl_i2c2_gpio>;
578 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
579 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
584 pinctrl-names = "default";
585 pinctrl-0 = <&pinctrl_accel>;
587 st,drdy-int-pin = <1>;
588 interrupt-parent = <&gpio1>;
593 /* off-board header */
595 clock-frequency = <400000>;
596 pinctrl-names = "default", "gpio";
597 pinctrl-0 = <&pinctrl_i2c3>;
598 pinctrl-1 = <&pinctrl_i2c3_gpio>;
599 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
600 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
604 /* off-board header */
606 clock-frequency = <400000>;
607 pinctrl-names = "default", "gpio";
608 pinctrl-0 = <&pinctrl_i2c4>;
609 pinctrl-1 = <&pinctrl_i2c4_gpio>;
610 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
611 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
616 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
617 fsl,clkreq-unsupported;
619 clock-names = "ref";
624 pinctrl-names = "default";
625 pinctrl-0 = <&pinctrl_pcie0>;
626 reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
629 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
631 assigned-clock-rates = <10000000>, <250000000>;
632 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
639 #address-cells = <3>;
640 #size-cells = <2>;
645 #address-cells = <3>;
646 #size-cells = <2>;
649 local-mac-address = [00 00 00 00 00 00];
654 /* off-board header */
656 pinctrl-names = "default";
657 pinctrl-0 = <&pinctrl_sai3>;
658 assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
659 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
660 assigned-clock-rates = <24576000>;
666 pinctrl-names = "default";
667 pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
668 rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
669 cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
675 pinctrl-names = "default";
676 pinctrl-0 = <&pinctrl_uart2>;
682 pinctrl-names = "default";
683 pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
684 rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
685 cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
689 compatible = "brcm,bcm4330-bt";
690 shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
696 pinctrl-names = "default";
697 pinctrl-0 = <&pinctrl_uart4>;
698 rts-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
699 cts-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
700 dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>;
701 dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>;
702 dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
708 vbus-supply = <®_usb1_vbus>;
709 disable-over-current;
715 disable-over-current;
721 pinctrl-names = "default", "state_100mhz", "state_200mhz";
722 pinctrl-0 = <&pinctrl_usdhc2>;
723 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
724 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
725 bus-width = <4>;
726 non-removable;
727 vmmc-supply = <®_wifi>;
728 #address-cells = <1>;
729 #size-cells = <0>;
733 compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac";
740 pinctrl-names = "default", "state_100mhz", "state_200mhz";
741 pinctrl-0 = <&pinctrl_usdhc3>;
742 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
743 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
744 bus-width = <8>;
745 non-removable;
750 pinctrl-names = "default";
751 pinctrl-0 = <&pinctrl_wdog>;
752 fsl,ext-reset-output;
757 pinctrl-names = "default";
758 pinctrl-0 = <&pinctrl_hog>;
1008 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
1019 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
1046 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
1062 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {