Lines Matching +full:1 +full:ee0000
36 #address-cells = <1>;
55 cpu1: cpu@1 {
112 /* DRAM space 1, size: 2GiB DRAM */
180 thermal-sensors = <&tmu 1>;
309 clockgen: clocking@1ee1000 {
320 #address-cells = <1>;
321 #size-cells = <1>;
324 extirq: interrupt-controller@1ac {
332 <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
351 #address-cells = <1>;
352 #size-cells = <1>;
391 sfp: efuse@1e80000 {
399 dcfg: dcfg@1ee0000 {
413 #address-cells = <1>;
421 QORIQ_CLK_PLL_DIV(1)>,
423 QORIQ_CLK_PLL_DIV(1)>;
443 tmu: tmu@1f00000 {
489 #thermal-sensor-cells = <1>;
516 #address-cells = <1>;
522 QORIQ_CLK_PLL_DIV(1)>;
530 #address-cells = <1>;
536 QORIQ_CLK_PLL_DIV(1)>;
537 dmas = <&edma0 1 38>,
538 <&edma0 1 39>;
545 #address-cells = <1>;
551 QORIQ_CLK_PLL_DIV(1)>;
558 #address-cells = <1>;
564 QORIQ_CLK_PLL_DIV(1)>;
571 #address-cells = <1>;
577 QORIQ_CLK_PLL_DIV(1)>;
587 QORIQ_CLK_PLL_DIV(1)>;
595 QORIQ_CLK_PLL_DIV(1)>;
603 QORIQ_CLK_PLL_DIV(1)>;
611 QORIQ_CLK_PLL_DIV(1)>;
655 #address-cells = <1>;
656 #size-cells = <1>;
662 fsl,qe-num-riscs = <1>;
669 #interrupt-cells = <1>;
687 cell-index = <1>;
701 #address-cells = <1>;
702 #size-cells = <1>;
728 QORIQ_CLK_PLL_DIV(1)>;
738 QORIQ_CLK_PLL_DIV(1)>;
748 QORIQ_CLK_PLL_DIV(1)>;
758 QORIQ_CLK_PLL_DIV(1)>;
768 QORIQ_CLK_PLL_DIV(1)>;
778 QORIQ_CLK_PLL_DIV(1)>;
795 QORIQ_CLK_PLL_DIV(1)>,
797 QORIQ_CLK_PLL_DIV(1)>;
815 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
827 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
839 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
850 QORIQ_CLK_PLL_DIV(1)>;
892 #interrupt-cells = <1>;
894 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
919 #interrupt-cells = <1>;
921 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
925 fsl,pcie-scfg = <&scfg 1>;
946 #interrupt-cells = <1>;
948 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
969 #dma-cells = <1>;
971 block-number = <1>;
979 rcpm: wakeup-controller@1ee2140 {
982 #fsl,rcpm-wakeup-cells = <1>;