Lines Matching +full:2 +full:c010000
18 #address-cells = <2>;
19 #size-cells = <2>;
39 #cooling-cells = <2>;
56 #cooling-cells = <2>;
61 cache-level = <2>;
117 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
119 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
121 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
123 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
134 #address-cells = <2>;
135 #size-cells = <2>;
204 #address-cells = <2>;
205 #size-cells = <2>;
267 #clock-cells = <2>;
380 QORIQ_CLK_PLL_DIV(2)>;
395 QORIQ_CLK_PLL_DIV(2)>;
410 QORIQ_CLK_PLL_DIV(2)>;
411 dmas = <&edma0 0 54>, <&edma0 0 2>;
449 QORIQ_CLK_PLL_DIV(2)>,
451 QORIQ_CLK_PLL_DIV(2)>;
461 QORIQ_CLK_PLL_DIV(2)>,
463 QORIQ_CLK_PLL_DIV(2)>;
473 QORIQ_CLK_PLL_DIV(2)>;
482 QORIQ_CLK_PLL_DIV(2)>;
492 QORIQ_CLK_PLL_DIV(2)>;
505 QORIQ_CLK_PLL_DIV(2)>;
518 QORIQ_CLK_PLL_DIV(2)>;
531 QORIQ_CLK_PLL_DIV(2)>;
544 QORIQ_CLK_PLL_DIV(2)>;
557 QORIQ_CLK_PLL_DIV(2)>;
566 #dma-cells = <2>;
577 QORIQ_CLK_PLL_DIV(2)>,
579 QORIQ_CLK_PLL_DIV(2)>;
587 #gpio-cells = <2>;
589 #interrupt-cells = <2>;
598 #gpio-cells = <2>;
600 #interrupt-cells = <2>;
609 #gpio-cells = <2>;
611 #interrupt-cells = <2>;
642 QORIQ_CLK_PLL_DIV(2)>;
655 #size-cells = <2>;
666 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
694 #size-cells = <2>;
705 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
832 fsl,dma-queues = <2>;
847 cluster1_core1_watchdog: watchdog@c010000 {
864 <&clockgen QORIQ_CLK_HWACCEL 2>,
865 <&clockgen QORIQ_CLK_HWACCEL 2>,
866 <&clockgen QORIQ_CLK_HWACCEL 2>;
882 clocks = <&clockgen QORIQ_CLK_HWACCEL 2>,
883 <&clockgen QORIQ_CLK_HWACCEL 2>,
884 <&clockgen QORIQ_CLK_HWACCEL 2>;
886 #cooling-cells = <2>;
895 QORIQ_CLK_PLL_DIV(2)>,
897 QORIQ_CLK_PLL_DIV(2)>,
899 QORIQ_CLK_PLL_DIV(2)>,
901 QORIQ_CLK_PLL_DIV(2)>;
916 QORIQ_CLK_PLL_DIV(2)>,
918 QORIQ_CLK_PLL_DIV(2)>,
920 QORIQ_CLK_PLL_DIV(2)>,
922 QORIQ_CLK_PLL_DIV(2)>;
937 QORIQ_CLK_PLL_DIV(2)>,
939 QORIQ_CLK_PLL_DIV(2)>,
941 QORIQ_CLK_PLL_DIV(2)>,
943 QORIQ_CLK_PLL_DIV(2)>;
958 QORIQ_CLK_PLL_DIV(2)>,
960 QORIQ_CLK_PLL_DIV(2)>,
962 QORIQ_CLK_PLL_DIV(2)>,
964 QORIQ_CLK_PLL_DIV(2)>;
979 QORIQ_CLK_PLL_DIV(2)>,
981 QORIQ_CLK_PLL_DIV(2)>,
983 QORIQ_CLK_PLL_DIV(2)>,
985 QORIQ_CLK_PLL_DIV(2)>;
1000 QORIQ_CLK_PLL_DIV(2)>,
1002 QORIQ_CLK_PLL_DIV(2)>,
1004 QORIQ_CLK_PLL_DIV(2)>,
1006 QORIQ_CLK_PLL_DIV(2)>;
1079 #size-cells = <2>;
1103 <0000 0 0 2 &gic 0 0 GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1117 enetc_port2: ethernet@0,2 {
1148 interrupts = <2>;
1166 mscc_felix_port2: port@2 {
1167 reg = <2>;