Lines Matching +full:sclk +full:- +full:strength
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2018-2021 NXP
11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi"
16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
38 stdout-path = "serial0:115200n8";
46 sys_mclk: clock-mclk {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <25000000>;
52 reg_1p8v: regulator-1p8v {
53 compatible = "regulator-fixed";
54 regulator-name = "1P8V";
55 regulator-min-microvolt = <1800000>;
56 regulator-max-microvolt = <1800000>;
57 regulator-always-on;
60 sb_3v3: regulator-sb3v3 {
61 compatible = "regulator-fixed";
62 regulator-name = "3v3_vbus";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 regulator-boot-on;
66 regulator-always-on;
70 compatible = "simple-audio-card";
71 simple-audio-card,format = "i2s";
72 simple-audio-card,widgets =
77 simple-audio-card,routing =
84 simple-audio-card,cpu {
85 sound-dai = <&sai4>;
86 frame-master;
87 bitclock-master;
90 simple-audio-card,codec {
91 sound-dai = <&sgtl5000>;
92 frame-master;
93 bitclock-master;
94 system-clock-frequency = <25000000>;
102 can-transceiver {
103 max-bitrate = <5000000>;
110 can-transceiver {
111 max-bitrate = <5000000>;
124 sgmii_phy0: ethernet-phy@2 {
129 qsgmii_phy0: ethernet-phy@10 {
133 qsgmii_phy1: ethernet-phy@11 {
137 qsgmii_phy2: ethernet-phy@12 {
141 qsgmii_phy3: ethernet-phy@13 {
147 phy-handle = <&sgmii_phy0>;
148 phy-mode = "sgmii";
149 managed = "in-band-status";
162 sd-uhs-sdr104;
163 sd-uhs-sdr50;
164 sd-uhs-sdr25;
165 sd-uhs-sdr12;
170 mmc-hs200-1_8v;
171 mmc-hs400-1_8v;
172 bus-width = <8>;
180 compatible = "jedec,spi-nor";
181 #address-cells = <1>;
182 #size-cells = <1>;
183 spi-max-frequency = <50000000>;
184 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
185 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
186 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
198 i2c-mux@77 {
201 #address-cells = <1>;
202 #size-cells = <0>;
205 #address-cells = <1>;
206 #size-cells = <0>;
209 /* Atmel AT24C512C-XHDB: 64 KB EEPROM */
213 #address-cells = <1>;
214 #size-cells = <1>;
217 /* AT24C04C 512-byte DDR4 SPD EEPROM */
222 #address-cells = <1>;
223 #size-cells = <1>;
226 /* Atmel AT24C02C-XHMB: 256-byte EEPROM */
230 #address-cells = <1>;
231 #size-cells = <1>;
236 #address-cells = <1>;
237 #size-cells = <0>;
240 sgtl5000: audio-codec@a {
241 #sound-dai-cells = <0>;
244 VDDA-supply = <®_1p8v>;
245 VDDIO-supply = <®_1p8v>;
247 sclk-strength = <3>;
252 #address-cells = <1>;
253 #size-cells = <0>;
256 current-monitor@40 {
259 shunt-resistor = <500>;
264 #address-cells = <1>;
265 #size-cells = <0>;
268 temperature-sensor@4c {
271 vcc-supply = <&sb_3v3>;
288 managed = "in-band-status";
289 phy-handle = <&qsgmii_phy0>;
290 phy-mode = "qsgmii";
296 managed = "in-band-status";
297 phy-handle = <&qsgmii_phy1>;
298 phy-mode = "qsgmii";
304 managed = "in-band-status";
305 phy-handle = <&qsgmii_phy2>;
306 phy-mode = "qsgmii";
312 managed = "in-band-status";
313 phy-handle = <&qsgmii_phy3>;
314 phy-mode = "qsgmii";