dts/arm/vexpress-v2f-1xv7-ca53x2.dts

1 // SPDX-License-Identifier: GPL-2.0
6  * V2F-1XV7
8  * Cortex-A53 (2 cores) Soft Macrocell Model
10  * HBI-0247C
13 /dts-v1/;
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include "arm/arm/vexpress-v2m-rs1.dtsi"
19 	model = "V2F-1XV7 Cortex-A53x2 SMM";
21 	arm,vexpress,site = <0xf>;
22 	compatible = "arm,vexpress,v2f-1xv7,ca53x2", "arm,vexpress,v2f-1xv7", "arm,vexpress";
23 	interrupt-parent = <&gic>;
24 	#address-cells = <2>;
25 	#size-cells = <2>;
28 		stdout-path = "serial0:38400n8";
41 		#address-cells = <2>;
42 		#size-cells = <0>;
46 			compatible = "arm,cortex-a53";
48 			next-level-cache = <&L2_0>;
53 			compatible = "arm,cortex-a53";
55 			next-level-cache = <&L2_0>;
58 		L2_0: l2-cache0 {
60 			cache-level = <2>;
61 			cache-unified;
70 	reserved-memory {
71 		#address-cells = <2>;
72 		#size-cells = <2>;
78 			compatible = "shared-dma-pool";
80 			no-map;
84 	gic: interrupt-controller@2c001000 {
85 		compatible = "arm,gic-400";
86 		#interrupt-cells = <3>;
87 		#address-cells = <0>;
88 		interrupt-controller;
97 		compatible = "arm,armv8-timer";
105 		compatible = "arm,cortex-a53-pmu";
111 		compatible = "arm,vexpress,config-bus";
112 		arm,vexpress,config-bridge = <&v2m_sysreg>;
114 		smbclk: clock-controller {
116 			compatible = "arm,vexpress-osc";
117 			arm,vexpress-sysreg,func = <1 4>;
118 			freq-range = <40000000 40000000>;
119 			#clock-cells = <0>;
120 			clock-output-names = "smclk";
123 		regulator-vio {
125 			compatible = "arm,vexpress-volt";
126 			arm,vexpress-sysreg,func = <2 0>;
127 			regulator-name = "VIO_UP";
128 			regulator-min-microvolt = <800000>;
129 			regulator-max-microvolt = <1800000>;
130 			regulator-always-on;
133 		regulator-12v {
135 			compatible = "arm,vexpress-volt";
136 			arm,vexpress-sysreg,func = <2 1>;
137 			regulator-name = "12";
138 			regulator-always-on;
141 		temp-fpga {
143 			compatible = "arm,vexpress-temp";
144 			arm,vexpress-sysreg,func = <4 0>;