dts/arm/rtsm_ve-motherboard.dtsi

1 // SPDX-License-Identifier: GPL-2.0
11 	v2m_clk24mhz: clock-24000000 {
12 		compatible = "fixed-clock";
13 		#clock-cells = <0>;
14 		clock-frequency = <24000000>;
15 		clock-output-names = "v2m:clk24mhz";
18 	v2m_refclk1mhz: clock-1000000 {
19 		compatible = "fixed-clock";
20 		#clock-cells = <0>;
21 		clock-frequency = <1000000>;
22 		clock-output-names = "v2m:refclk1mhz";
25 	v2m_refclk32khz: clock-32768 {
26 		compatible = "fixed-clock";
27 		#clock-cells = <0>;
28 		clock-frequency = <32768>;
29 		clock-output-names = "v2m:refclk32khz";
32 	v2m_fixed_3v3: regulator-3v3 {
33 		compatible = "regulator-fixed";
34 		regulator-name = "3V3";
35 		regulator-min-microvolt = <3300000>;
36 		regulator-max-microvolt = <3300000>;
37 		regulator-always-on;
41 		compatible = "arm,vexpress,config-bus";
42 		arm,vexpress,config-bridge = <&v2m_sysreg>;
44 		v2m_oscclk1: clock-controller {
46 			compatible = "arm,vexpress-osc";
47 			arm,vexpress-sysreg,func = <1 1>;
48 			freq-range = <23750000 63500000>;
49 			#clock-cells = <0>;
50 			clock-output-names = "v2m:oscclk1";
54 			compatible = "arm,vexpress-reset";
55 			arm,vexpress-sysreg,func = <5 0>;
59 			compatible = "arm,vexpress-muxfpga";
60 			arm,vexpress-sysreg,func = <7 0>;
64 			compatible = "arm,vexpress-shutdown";
65 			arm,vexpress-sysreg,func = <8 0>;
69 			compatible = "arm,vexpress-reboot";
70 			arm,vexpress-sysreg,func = <9 0>;
74 			compatible = "arm,vexpress-dvimode";
75 			arm,vexpress-sysreg,func = <11 0>;
80 		compatible = "simple-bus";
81 		#address-cells = <2>;
82 		#size-cells = <1>;
85 		motherboard-bus@8000000 {
86 			compatible = "arm,vexpress,v2m-p1", "simple-bus";
87 			#address-cells = <2>; /* SMB chipselect number and offset */
88 			#size-cells = <1>;
97 				compatible = "arm,vexpress-flash", "cfi-flash";
100 				bank-width = <4>;
109 			iofpga-bus@300000000 {
110 				compatible = "simple-bus";
111 				#address-cells = <1>;
112 				#size-cells = <1>;
115 				v2m_sysreg: sysreg@10000 {
116 					compatible = "arm,vexpress-sysreg";
118 					gpio-controller;
119 					#gpio-cells = <2>;
126 					clock-names = "refclk", "timclk", "apb_pclk";
127 					#clock-cells = <1>;
128 					clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
129 					assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
130 …assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz…
138 					clock-names = "apb_pclk";
145 					cd-gpios = <&v2m_sysreg 0 0>;
146 					wp-gpios = <&v2m_sysreg 1 0>;
147 					max-frequency = <12000000>;
148 					vmmc-supply = <&v2m_fixed_3v3>;
150 					clock-names = "mclk", "apb_pclk";
158 					clock-names = "KMIREFCLK", "apb_pclk";
166 					clock-names = "KMIREFCLK", "apb_pclk";
174 					clock-names = "uartclk", "apb_pclk";
182 					clock-names = "uartclk", "apb_pclk";
190 					clock-names = "uartclk", "apb_pclk";
198 					clock-names = "uartclk", "apb_pclk";
206 					clock-names = "wdog_clk", "apb_pclk";
214 					clock-names = "timclken1", "timclken2", "apb_pclk";
222 					clock-names = "timclken1", "timclken2", "apb_pclk";
236 					clock-names = "apb_pclk";
242 					interrupt-names = "combined";
245 					clock-names = "clcdclk", "apb_pclk";
246 					memory-region = <&vram>;
250 							remote-endpoint = <&panel_in>;
251 							arm,pl11x,tft-r0g0b0-pads = <0 8 16>;