Lines Matching +full:0 +full:x210000
13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
49 #clock-cells = <0>;
55 arm,vexpress-sysreg,func = <5 0>;
60 arm,vexpress-sysreg,func = <7 0>;
65 arm,vexpress-sysreg,func = <8 0>;
70 arm,vexpress-sysreg,func = <9 0>;
75 arm,vexpress-sysreg,func = <11 0>;
83 ranges = <0 0x8000000 0 0x8000000 0x18000000>;
89 ranges = <0 0 0 0x08000000 0x04000000>,
90 <1 0 0 0x14000000 0x04000000>,
91 <2 0 0 0x18000000 0x04000000>,
92 <3 0 0 0x1c000000 0x04000000>,
93 <4 0 0 0x0c000000 0x04000000>,
94 <5 0 0 0x10000000 0x04000000>;
96 flash@0 {
98 reg = <0 0x00000000 0x04000000>,
99 <4 0x00000000 0x04000000>;
105 reg = <2 0x02000000 0x10000>;
113 ranges = <0 3 0 0x210000>;
117 reg = <0x010000 0x1000>;
124 reg = <0x020000 0x1000>;
129 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
135 reg = <0x040000 0x1000>;
143 reg = <0x050000 0x1000>;
145 cd-gpios = <&v2m_sysreg 0 0>;
146 wp-gpios = <&v2m_sysreg 1 0>;
155 reg = <0x060000 0x1000>;
163 reg = <0x070000 0x1000>;
171 reg = <0x090000 0x1000>;
179 reg = <0x0a0000 0x1000>;
187 reg = <0x0b0000 0x1000>;
195 reg = <0x0c0000 0x1000>;
203 reg = <0x0f0000 0x1000>;
204 interrupts = <0>;
211 reg = <0x110000 0x1000>;
213 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
219 reg = <0x120000 0x1000>;
227 reg = <0x130000 0x200>;
233 reg = <0x170000 0x1000>;
241 reg = <0x1f0000 0x1000>;
251 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;