dts/amlogic/meson-sm1-s905d3-libretech-cc.dts

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/clock/g12a-clkc.h>
10 #include "meson-sm1.dtsi"
11 #include "meson-libretech-cottonwood.dtsi"
14 	compatible = "libretech,aml-s905d3-cc", "amlogic,sm1";
15 	model = "Libre Computer AML-S905D3-CC Solitude";
18 		model = "LC-SOLITUDE";
19 		audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
20 				"TDMOUT_A IN 1", "FRDDR_B OUT 0",
21 				"TDMOUT_A IN 2", "FRDDR_C OUT 0",
23 				"TDMOUT_B IN 0", "FRDDR_A OUT 1",
24 				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
25 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
27 				"TDMOUT_C IN 0", "FRDDR_A OUT 2",
28 				"TDMOUT_C IN 1", "FRDDR_B OUT 2",
29 				"TDMOUT_C IN 2", "FRDDR_C OUT 2",
31 				"TDMIN_A IN 0", "TDM_A Capture",
32 				"TDMIN_B IN 0", "TDM_A Capture",
33 				"TDMIN_C IN 0", "TDM_A Capture",
34 				"TDMIN_A IN 13", "TDM_A Loopback",
35 				"TDMIN_B IN 13", "TDM_A Loopback",
36 				"TDMIN_C IN 13", "TDM_A Loopback",
37 				"TDMIN_A IN 1", "TDM_B Capture",
38 				"TDMIN_B IN 1", "TDM_B Capture",
39 				"TDMIN_C IN 1", "TDM_B Capture",
40 				"TDMIN_A IN 14", "TDM_B Loopback",
41 				"TDMIN_B IN 14", "TDM_B Loopback",
42 				"TDMIN_C IN 14", "TDM_B Loopback",
43 				"TDMIN_A IN 2", "TDM_C Capture",
44 				"TDMIN_B IN 2", "TDM_C Capture",
45 				"TDMIN_C IN 2", "TDM_C Capture",
46 				"TDMIN_A IN 15", "TDM_C Loopback",
47 				"TDMIN_B IN 15", "TDM_C Loopback",
48 				"TDMIN_C IN 15", "TDM_C Loopback",
49 				"TODDR_A IN 0", "TDMIN_A OUT",
50 				"TODDR_B IN 0", "TDMIN_A OUT",
51 				"TODDR_C IN 0", "TDMIN_A OUT",
52 				"TODDR_A IN 1", "TDMIN_B OUT",
53 				"TODDR_B IN 1", "TDMIN_B OUT",
54 				"TODDR_C IN 1", "TDMIN_B OUT",
55 				"TODDR_A IN 2", "TDMIN_C OUT",
56 				"TODDR_B IN 2", "TDMIN_C OUT",
57 				"TODDR_C IN 2", "TDMIN_C OUT",
64 	cpu-supply = <&vddcpu_b>;
65 	operating-points-v2 = <&cpu_opp_table>;
67 	clock-latency = <50000>;
71 	cpu-supply = <&vddcpu_b>;
72 	operating-points-v2 = <&cpu_opp_table>;
74 	clock-latency = <50000>;
78 	cpu-supply = <&vddcpu_b>;
79 	operating-points-v2 = <&cpu_opp_table>;
81 	clock-latency = <50000>;
85 	cpu-supply = <&vddcpu_b>;
86 	operating-points-v2 = <&cpu_opp_table>;
88 	clock-latency = <50000>;