dts/amlogic/meson-s4-s805x2-aq222.dts

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-s4.dtsi"
13 	interrupt-parent = <&gic>;
14 	#address-cells = <2>;
15 	#size-cells = <2>;
26 	reserved-memory {
27 		#address-cells = <2>;
28 		#size-cells = <2>;
34 			no-map;
38 	sdio_32k: sdio-32k {
39 		compatible = "pwm-clock";
40 		#clock-cells = <0>;
41 		clock-frequency = <32768>;
45 	sdio_pwrseq: sdio-pwrseq {
46 		compatible = "mmc-pwrseq-simple";
47 		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
49 		clock-names = "ext_clock";
52 	main_12v: regulator-main-12v {
53 		compatible = "regulator-fixed";
54 		regulator-name = "12V";
55 		regulator-min-microvolt = <12000000>;
56 		regulator-max-microvolt = <12000000>;
57 		regulator-always-on;
60 	vddao_3v3: regulator-vddao-3v3 {
61 		compatible = "regulator-fixed";
62 		regulator-name = "VDDAO_3V3";
63 		regulator-min-microvolt = <3300000>;
64 		regulator-max-microvolt = <3300000>;
65 		vin-supply = <&main_12v>;
66 		regulator-always-on;
69 	vddio_ao1v8: regulator-vddio-ao1v8 {
70 	       compatible = "regulator-fixed";
71 	       regulator-name = "VDDIO_AO1V8";
72 	       regulator-min-microvolt = <1800000>;
73 	       regulator-max-microvolt = <1800000>;
74 	       vin-supply = <&vddao_3v3>;
75 	       regulator-always-on;
79 	vddcpu: regulator-vddcpu {
80 		compatible = "pwm-regulator";
82 		regulator-name = "VDDCPU";
83 		regulator-min-microvolt = <689000>;
84 		regulator-max-microvolt = <1049000>;
86 		vin-supply = <&main_12v>;
89 		pwm-dutycycle-range = <100 0>;
91 		regulator-boot-on;
92 		regulator-always-on;
93 		/* Voltage Duty-Cycle */
94 		voltage-table = <1049000 0>,
136 	pinctrl-0 = <&pwm_e_pins1>;
137 	pinctrl-names = "default";
150 	pinctrl-0 = <&remote_pins>;
151 	pinctrl-names = "default";
155 	pinctrl-0 = <&sdio_pins>;
156 	pinctrl-1 = <&sdio_clk_gate_pins>;
157 	pinctrl-names = "default", "clk-gate";
158 	#address-cells = <1>;
159 	#size-cells = <0>;
160 	bus-width = <4>;
161 	cap-sd-highspeed;
162 	sd-uhs-sdr50;
163 	sd-uhs-sdr104;
164 	max-frequency = <200000000>;
165 	non-removable;
166 	disable-wp;
167 	no-sd;
168 	no-mmc;
169 	vmmc-supply = <&vddao_3v3>;
170 	vqmmc-supply = <&vddio_ao1v8>;
175 	pinctrl-0 = <&sdcard_pins>;
176 	pinctrl-1 = <&sdcard_clk_gate_pins>;
177 	pinctrl-names = "default", "clk-gate";
178 	bus-width = <4>;
179 	cap-sd-highspeed;
180 	max-frequency = <200000000>;
181 	disable-wp;
183 	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
184 	vmmc-supply = <&vddao_3v3>;
185 	vqmmc-supply = <&vddao_3v3>;
190 	#address-cells = <1>;
191 	#size-cells = <0>;
193 	pinctrl-0 = <&nand_pins>;
194 	pinctrl-names = "default";
198 		#address-cells = <1>;
199 		#size-cells = <1>;
201 		nand-on-flash-bbt;
228 	pinctrl-names = "default";
229 	pinctrl-0 = <&spicc0_pins_x>;
230 	cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>;
235 	phy-handle = <&internal_ephy>;
236 	phy-mode = "rmii";