Lines Matching +full:gpio +full:- +full:mux +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
20 #phy-cells = <0>;
24 clock-names = "usb_general", "usb";
29 compatible = "amlogic,meson-gxbb-usb2-phy";
30 #phy-cells = <0>;
34 clock-names = "usb_general", "usb";
39 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
43 clock-names = "otg";
45 phy-names = "usb2-phy";
51 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
55 clock-names = "otg";
57 phy-names = "usb2-phy";
65 compatible = "amlogic,aiu-gxbb", "amlogic,aiu";
75 clock-names = "pclk",
89 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
90 #address-cells = <2>;
91 #size-cells = <2>;
98 reg-names = "mux", "pull", "gpio";
99 gpio-controller;
100 #gpio-cells = <2>;
101 gpio-ranges = <&pinctrl_aobus 0 0 14>;
105 mux {
108 bias-disable;
113 mux {
117 bias-disable;
122 mux {
125 bias-disable;
130 mux {
134 bias-disable;
139 mux {
142 bias-disable;
147 mux {
151 bias-disable;
156 mux {
159 bias-disable;
164 mux {
167 bias-disable;
172 mux {
175 bias-disable;
180 mux {
183 bias-disable;
188 mux {
191 bias-disable;
196 mux {
199 bias-disable;
204 mux {
207 bias-disable;
212 mux {
215 bias-disable;
220 mux {
223 bias-disable;
228 mux {
231 bias-disable;
236 mux {
243 mux {
246 bias-disable;
251 mux {
254 bias-disable;
259 mux {
262 bias-disable;
270 compatible = "amlogic,meson-gxbb-spifc";
272 #address-cells = <1>;
273 #size-cells = <0>;
281 clock-names = "core";
285 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
287 clock-names = "xtal", "mpeg-clk";
299 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
303 compatible = "amlogic,meson-gxbb-gpio-intc",
304 "amlogic,meson-gpio-intc";
309 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
313 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
317 clock-names = "isfr", "iahb", "venci";
318 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
320 assigned-clocks = <&clkc CLKID_HDMI_SEL>,
322 assigned-clock-parents = <&xtal>, <0>;
323 assigned-clock-rates = <0>, <24000000>;
327 clkc: clock-controller {
328 compatible = "amlogic,gxbb-clkc";
329 #clock-cells = <1>;
331 clock-names = "xtal";
337 clock-names = "core";
357 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
360 clock-names = "bus", "core";
362 assigned-clocks = <&clkc CLKID_GP0_PLL>;
363 assigned-clock-rates = <744000000>;
368 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
369 #address-cells = <2>;
370 #size-cells = <2>;
373 gpio: bank@4b0 { label
378 reg-names = "mux", "pull", "pull-enable", "gpio";
379 gpio-controller;
380 #gpio-cells = <2>;
381 gpio-ranges = <&pinctrl_periphs 0 0 119>;
385 mux-0 {
389 bias-pull-up;
392 mux-1 {
395 bias-disable;
399 emmc_ds_pins: emmc-ds {
400 mux {
403 bias-pull-down;
408 mux {
411 bias-pull-down;
416 mux {
422 bias-disable;
426 spi_pins: spi-pins {
427 mux {
432 bias-disable;
436 spi_idle_high_pins: spi-idle-high-pins {
437 mux {
439 bias-pull-up;
443 spi_idle_low_pins: spi-idle-low-pins {
444 mux {
446 bias-pull-down;
450 spi_ss0_pins: spi-ss0 {
451 mux {
454 bias-disable;
459 mux-0 {
466 bias-pull-up;
469 mux-1 {
472 bias-disable;
477 mux {
480 bias-pull-down;
485 mux-0 {
492 bias-pull-up;
495 mux-1 {
498 bias-disable;
503 mux {
506 bias-pull-down;
511 mux {
514 bias-disable;
519 mux {
523 bias-disable;
528 mux {
532 bias-disable;
537 mux {
541 bias-disable;
546 mux {
550 bias-disable;
555 mux {
559 bias-disable;
564 mux {
568 bias-disable;
573 mux {
577 bias-disable;
582 mux {
586 bias-disable;
591 mux {
595 bias-disable;
599 eth_rgmii_pins: eth-rgmii {
600 mux {
616 bias-disable;
620 eth_rmii_pins: eth-rmii {
621 mux {
632 bias-disable;
637 mux {
640 bias-disable;
645 mux {
648 bias-disable;
653 mux {
656 bias-disable;
661 mux {
664 bias-disable;
669 mux {
672 bias-disable;
677 mux {
680 bias-disable;
685 mux {
688 bias-disable;
693 mux {
696 bias-disable;
701 mux {
704 bias-disable;
709 mux {
712 bias-disable;
717 mux {
720 bias-disable;
725 mux {
728 bias-disable;
733 mux {
736 bias-disable;
755 reset-names = "viu", "venc", "vcbus", "bt656",
760 clock-names = "vpu", "vapb";
762 * VPU clocking is provided by two identical clock paths
763 * VPU_0 and VPU_1 muxed to a single clock by a glitch
764 * free mux to safely change frequency while running.
765 * Same for VAPB but with a final gate after the glitch free mux.
767 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
769 <&clkc CLKID_VPU>, /* Glitch free mux */
772 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
773 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
779 assigned-clock-rates = <0>, /* Do Nothing */
788 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
793 clock-names = "clkin", "core", "adc_clk", "adc_sel";
800 clock-names = "core", "clkin0", "clkin1";
808 clock-names = "core", "clkin0", "clkin1";
816 clock-names = "core", "clkin0", "clkin1";
828 clock-names = "core";
830 num-cs = <1>;
839 clock-names = "xtal", "pclk", "baud";
844 clock-names = "xtal", "pclk", "baud";
849 clock-names = "xtal", "pclk", "baud";
854 clock-names = "xtal", "pclk", "baud";
859 clock-names = "xtal", "pclk", "baud";
863 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
864 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
868 compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
873 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
875 reset-names = "esparser";