Lines Matching +full:pwm +full:- +full:dutycycle +full:- +full:range
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 vddcpu_a: regulator-vddcpu-a {
15 compatible = "pwm-regulator";
17 regulator-name = "VDDCPU_A";
18 regulator-min-microvolt = <690000>;
19 regulator-max-microvolt = <1050000>;
21 pwm-supply = <&dc_in>;
24 pwm-dutycycle-range = <100 0>;
26 regulator-boot-on;
27 regulator-always-on;
30 vddcpu_b: regulator-vddcpu-b {
34 compatible = "pwm-regulator";
36 regulator-name = "VDDCPU_B";
37 regulator-min-microvolt = <690000>;
38 regulator-max-microvolt = <1050000>;
40 pwm-supply = <&vsys_3v3>;
43 pwm-dutycycle-range = <100 0>;
45 regulator-boot-on;
46 regulator-always-on;
51 cpu-supply = <&vddcpu_b>;
52 operating-points-v2 = <&cpu_opp_table_0>;
54 clock-latency = <50000>;
58 cpu-supply = <&vddcpu_b>;
59 operating-points-v2 = <&cpu_opp_table_0>;
61 clock-latency = <50000>;
65 cpu-supply = <&vddcpu_a>;
66 operating-points-v2 = <&cpub_opp_table_1>;
68 clock-latency = <50000>;
72 cpu-supply = <&vddcpu_a>;
73 operating-points-v2 = <&cpub_opp_table_1>;
75 clock-latency = <50000>;
79 cpu-supply = <&vddcpu_a>;
80 operating-points-v2 = <&cpub_opp_table_1>;
82 clock-latency = <50000>;
86 cpu-supply = <&vddcpu_a>;
87 operating-points-v2 = <&cpub_opp_table_1>;
89 clock-latency = <50000>;
93 pinctrl-0 = <&pwm_a_e_pins>;
94 pinctrl-names = "default";
96 clock-names = "clkin0";
101 pinctrl-0 = <&pwm_ao_d_e_pins>;
102 pinctrl-names = "default";
104 clock-names = "clkin1";