Lines Matching +full:4 +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
22 compatible = "shared-dma-pool";
25 no-map;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
37 next-level-cache = <&l2_shared>;
42 compatible = "arm,cortex-a53";
44 enable-method = "psci";
45 next-level-cache = <&l2_shared>;
50 compatible = "arm,cortex-a53";
52 enable-method = "psci";
53 next-level-cache = <&l2_shared>;
58 compatible = "arm,cortex-a53";
60 enable-method = "psci";
61 next-level-cache = <&l2_shared>;
67 cache-level = <2>;
68 cache-unified;
74 compatible = "intel,stratix10-svc";
76 memory-region = <&service_reserved>;
78 fpga_mgr: fpga-mgr {
79 compatible = "intel,stratix10-soc-fpga-mgr";
84 fpga-region {
85 compatible = "fpga-region";
86 #address-cells = <0x2>;
87 #size-cells = <0x2>;
88 fpga-mgr = <&fpga_mgr>;
92 compatible = "arm,cortex-a53-pmu";
93 interrupts = <0 170 4>,
94 <0 171 4>,
95 <0 172 4>,
96 <0 173 4>;
97 interrupt-affinity = <&cpu0>,
101 interrupt-parent = <&intc>;
105 compatible = "arm,psci-0.2";
111 compatible = "arm,armv8-timer";
116 interrupt-parent = <&intc>;
119 intc: interrupt-controller@fffc1000 {
120 compatible = "arm,gic-400", "arm,cortex-a15-gic";
121 #interrupt-cells = <3>;
122 interrupt-controller;
130 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
131 #clock-cells = <0>;
132 compatible = "fixed-clock";
135 cb_intosc_ls_clk: cb-intosc-ls-clk {
136 #clock-cells = <0>;
137 compatible = "fixed-clock";
140 f2s_free_clk: f2s-free-clk {
141 #clock-cells = <0>;
142 compatible = "fixed-clock";
146 #clock-cells = <0>;
147 compatible = "fixed-clock";
150 qspi_clk: qspi-clk {
151 #clock-cells = <0>;
152 compatible = "fixed-clock";
153 clock-frequency = <200000000>;
158 #address-cells = <1>;
159 #size-cells = <1>;
160 compatible = "simple-bus";
162 interrupt-parent = <&intc>;
165 clkmgr: clock-controller@ffd10000 {
166 compatible = "intel,stratix10-clkmgr";
168 #clock-cells = <1>;
172 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
174 interrupts = <0 90 4>;
175 interrupt-names = "macirq";
176 mac-address = [00 00 00 00 00 00];
178 reset-names = "stmmaceth", "ahb";
180 clock-names = "stmmaceth", "ptp_ref";
181 tx-fifo-depth = <16384>;
182 rx-fifo-depth = <16384>;
183 snps,multicast-filter-bins = <256>;
185 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
190 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
192 interrupts = <0 91 4>;
193 interrupt-names = "macirq";
194 mac-address = [00 00 00 00 00 00];
196 reset-names = "stmmaceth", "ahb";
198 clock-names = "stmmaceth", "ptp_ref";
199 tx-fifo-depth = <16384>;
200 rx-fifo-depth = <16384>;
201 snps,multicast-filter-bins = <256>;
203 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
208 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
210 interrupts = <0 92 4>;
211 interrupt-names = "macirq";
212 mac-address = [00 00 00 00 00 00];
214 reset-names = "stmmaceth", "ahb";
216 clock-names = "stmmaceth", "ptp_ref";
217 tx-fifo-depth = <16384>;
218 rx-fifo-depth = <16384>;
219 snps,multicast-filter-bins = <256>;
221 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
226 #address-cells = <1>;
227 #size-cells = <0>;
228 compatible = "snps,dw-apb-gpio";
233 porta: gpio-controller@0 {
234 compatible = "snps,dw-apb-gpio-port";
235 gpio-controller;
236 #gpio-cells = <2>;
239 interrupt-controller;
240 #interrupt-cells = <2>;
241 interrupts = <0 110 4>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 compatible = "snps,dw-apb-gpio";
253 portb: gpio-controller@0 {
254 compatible = "snps,dw-apb-gpio-port";
255 gpio-controller;
256 #gpio-cells = <2>;
259 interrupt-controller;
260 #interrupt-cells = <2>;
261 interrupts = <0 111 4>;
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "snps,designware-i2c";
270 interrupts = <0 103 4>;
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "snps,designware-i2c";
281 interrupts = <0 104 4>;
288 #address-cells = <1>;
289 #size-cells = <0>;
290 compatible = "snps,designware-i2c";
292 interrupts = <0 105 4>;
299 #address-cells = <1>;
300 #size-cells = <0>;
301 compatible = "snps,designware-i2c";
303 interrupts = <0 106 4>;
310 #address-cells = <1>;
311 #size-cells = <0>;
312 compatible = "snps,designware-i2c";
314 interrupts = <0 107 4>;
321 #address-cells = <1>;
322 #size-cells = <0>;
323 compatible = "altr,socfpga-dw-mshc";
325 interrupts = <0 96 4>;
326 fifo-depth = <0x400>;
328 reset-names = "reset";
331 clock-names = "biu", "ciu";
333 altr,sysmgr-syscon = <&sysmgr 0x28 4>;
337 nand: nand-controller@ffb90000 {
338 #address-cells = <1>;
339 #size-cells = <0>;
340 compatible = "altr,socfpga-denali-nand";
343 reg-names = "nand_data", "denali_reg";
344 interrupts = <0 97 4>;
348 clock-names = "nand", "nand_x", "ecc";
354 compatible = "mmio-sram";
356 #address-cells = <1>;
357 #size-cells = <1>;
361 pdma: dma-controller@ffda0000 {
364 interrupts = <0 81 4>,
365 <0 82 4>,
366 <0 83 4>,
367 <0 84 4>,
368 <0 85 4>,
369 <0 86 4>,
370 <0 87 4>,
371 <0 88 4>,
372 <0 89 4>;
373 #dma-cells = <1>;
375 clock-names = "apb_pclk";
377 reset-names = "dma", "dma-ocp";
381 compatible = "pinctrl-single";
383 #pinctrl-cells = <1>;
384 pinctrl-single,register-width = <32>;
385 pinctrl-single,function-mask = <0x0000000f>;
389 compatible = "pinctrl-single";
391 #pinctrl-cells = <1>;
392 pinctrl-single,register-width = <32>;
393 pinctrl-single,function-mask = <0x0000000f>;
397 #reset-cells = <1>;
398 compatible = "altr,stratix10-rst-mgr";
403 compatible = "arm,mmu-500", "arm,smmu-v2";
405 #global-interrupts = <2>;
406 #iommu-cells = <1>;
408 clock-names = "iommu";
409 interrupt-parent = <&intc>;
410 interrupts = <0 128 4>, /* Global Secure Fault */
411 <0 129 4>, /* Global Non-secure Fault */
412 /* Non-secure Context Interrupts (32) */
413 <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>,
414 <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>,
415 <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>,
416 <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>,
417 <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>,
418 <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>,
419 <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>,
420 <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>;
421 stream-match-mask = <0x7ff0>;
426 compatible = "snps,dw-apb-ssi";
427 #address-cells = <1>;
428 #size-cells = <0>;
430 interrupts = <0 99 4>;
432 reset-names = "spi";
433 reg-io-width = <4>;
434 num-cs = <4>;
440 compatible = "snps,dw-apb-ssi";
441 #address-cells = <1>;
442 #size-cells = <0>;
444 interrupts = <0 100 4>;
446 reset-names = "spi";
447 reg-io-width = <4>;
448 num-cs = <4>;
454 compatible = "altr,sys-mgr-s10","altr,sys-mgr";
459 compatible = "snps,dw-apb-timer";
460 interrupts = <0 113 4>;
463 clock-names = "timer";
467 compatible = "snps,dw-apb-timer";
468 interrupts = <0 114 4>;
471 clock-names = "timer";
475 compatible = "snps,dw-apb-timer";
476 interrupts = <0 115 4>;
479 clock-names = "timer";
483 compatible = "snps,dw-apb-timer";
484 interrupts = <0 116 4>;
487 clock-names = "timer";
491 compatible = "snps,dw-apb-uart";
493 interrupts = <0 108 4>;
494 reg-shift = <2>;
495 reg-io-width = <4>;
502 compatible = "snps,dw-apb-uart";
504 interrupts = <0 109 4>;
505 reg-shift = <2>;
506 reg-io-width = <4>;
515 interrupts = <0 93 4>;
517 phy-names = "usb2-phy";
519 reset-names = "dwc2", "dwc2-ecc";
521 clock-names = "otg";
529 interrupts = <0 94 4>;
531 phy-names = "usb2-phy";
533 reset-names = "dwc2", "dwc2-ecc";
535 clock-names = "otg";
541 compatible = "snps,dw-wdt";
543 interrupts = <0 117 4>;
550 compatible = "snps,dw-wdt";
552 interrupts = <0 118 4>;
559 compatible = "snps,dw-wdt";
561 interrupts = <0 125 4>;
568 compatible = "snps,dw-wdt";
570 interrupts = <0 126 4>;
577 compatible = "altr,sdr-ctl", "syscon";
582 compatible = "altr,socfpga-s10-ecc-manager",
583 "altr,socfpga-a10-ecc-manager";
584 altr,sysmgr-syscon = <&sysmgr>;
585 #address-cells = <1>;
586 #size-cells = <1>;
587 interrupts = <0 15 4>;
588 interrupt-controller;
589 #interrupt-cells = <2>;
593 compatible = "altr,sdram-edac-s10";
594 altr,sdr-syscon = <&sdr>;
595 interrupts = <16 4>;
598 ocram-ecc@ff8cc000 {
599 compatible = "altr,socfpga-s10-ocram-ecc",
600 "altr,socfpga-a10-ocram-ecc";
602 altr,ecc-parent = <&ocram>;
603 interrupts = <1 4>;
606 usb0-ecc@ff8c4000 {
607 compatible = "altr,socfpga-s10-usb-ecc",
608 "altr,socfpga-usb-ecc";
610 altr,ecc-parent = <&usb0>;
611 interrupts = <2 4>;
614 emac0-rx-ecc@ff8c0000 {
615 compatible = "altr,socfpga-s10-eth-mac-ecc",
616 "altr,socfpga-eth-mac-ecc";
618 altr,ecc-parent = <&gmac0>;
619 interrupts = <4 4>;
622 emac0-tx-ecc@ff8c0400 {
623 compatible = "altr,socfpga-s10-eth-mac-ecc",
624 "altr,socfpga-eth-mac-ecc";
626 altr,ecc-parent = <&gmac0>;
627 interrupts = <5 4>;
633 compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
634 #address-cells = <1>;
635 #size-cells = <0>;
638 interrupts = <0 3 4>;
639 cdns,fifo-depth = <128>;
640 cdns,fifo-width = <4>;
641 cdns,trigger-address = <0x00000000>;
649 compatible = "usb-nop-xceiv";
650 #phy-cells = <0>;