Lines Matching full:ccu

6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
30 clocks = <&ccu CLK_TCON0>,
40 <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
54 clocks = <&ccu CLK_CPUX>;
71 clocks = <&ccu CLK_CPUX>;
88 clocks = <&ccu CLK_CPUX>;
105 clocks = <&ccu CLK_CPUX>;
309 clocks = <&ccu CLK_BUS_DE>,
310 <&ccu CLK_DE>;
313 resets = <&ccu RST_BUS_DE>;
432 clocks = <&ccu CLK_BUS_DMA>;
435 resets = <&ccu RST_BUS_DMA>;
444 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
448 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
490 clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
492 resets = <&ccu RST_BUS_TCON1>;
531 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
532 <&ccu CLK_DRAM_VE>;
534 resets = <&ccu RST_BUS_VE>;
542 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
544 resets = <&ccu RST_BUS_MMC0>;
556 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
558 resets = <&ccu RST_BUS_MMC1>;
570 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
572 resets = <&ccu RST_BUS_MMC2>;
596 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
598 resets = <&ccu RST_BUS_CE>;
605 clocks = <&ccu CLK_BUS_MSGBOX>;
606 resets = <&ccu RST_BUS_MSGBOX>;
614 clocks = <&ccu CLK_BUS_OTG>;
615 resets = <&ccu RST_BUS_OTG>;
633 clocks = <&ccu CLK_USB_PHY0>,
634 <&ccu CLK_USB_PHY1>;
637 resets = <&ccu RST_USB_PHY0>,
638 <&ccu RST_USB_PHY1>;
649 clocks = <&ccu CLK_BUS_OHCI0>,
650 <&ccu CLK_BUS_EHCI0>,
651 <&ccu CLK_USB_OHCI0>;
652 resets = <&ccu RST_BUS_OHCI0>,
653 <&ccu RST_BUS_EHCI0>;
663 clocks = <&ccu CLK_BUS_OHCI0>,
664 <&ccu CLK_USB_OHCI0>;
665 resets = <&ccu RST_BUS_OHCI0>;
675 clocks = <&ccu CLK_BUS_OHCI1>,
676 <&ccu CLK_BUS_EHCI1>,
677 <&ccu CLK_USB_OHCI1>;
678 resets = <&ccu RST_BUS_OHCI1>,
679 <&ccu RST_BUS_EHCI1>;
689 clocks = <&ccu CLK_BUS_OHCI1>,
690 <&ccu CLK_USB_OHCI1>;
691 resets = <&ccu RST_BUS_OHCI1>;
697 ccu: clock@1c20000 { label
698 compatible = "allwinner,sun50i-a64-ccu";
713 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
896 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
897 resets = <&ccu RST_BUS_SPDIF>;
921 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
923 resets = <&ccu RST_BUS_I2S0>;
935 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
937 resets = <&ccu RST_BUS_I2S1>;
949 clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
951 resets = <&ccu RST_BUS_I2S2>;
962 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
964 resets = <&ccu RST_BUS_CODEC>;
976 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
984 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
987 resets = <&ccu RST_BUS_THS>;
999 clocks = <&ccu CLK_BUS_UART0>;
1000 resets = <&ccu RST_BUS_UART0>;
1010 clocks = <&ccu CLK_BUS_UART1>;
1011 resets = <&ccu RST_BUS_UART1>;
1021 clocks = <&ccu CLK_BUS_UART2>;
1022 resets = <&ccu RST_BUS_UART2>;
1032 clocks = <&ccu CLK_BUS_UART3>;
1033 resets = <&ccu RST_BUS_UART3>;
1043 clocks = <&ccu CLK_BUS_UART4>;
1044 resets = <&ccu RST_BUS_UART4>;
1052 clocks = <&ccu CLK_BUS_I2C0>;
1053 resets = <&ccu RST_BUS_I2C0>;
1065 clocks = <&ccu CLK_BUS_I2C1>;
1066 resets = <&ccu RST_BUS_I2C1>;
1078 clocks = <&ccu CLK_BUS_I2C2>;
1079 resets = <&ccu RST_BUS_I2C2>;
1091 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
1097 resets = <&ccu RST_BUS_SPI0>;
1108 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
1114 resets = <&ccu RST_BUS_SPI1>;
1127 resets = <&ccu RST_BUS_EMAC>;
1129 clocks = <&ccu CLK_BUS_EMAC>;
1157 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
1159 resets = <&ccu RST_BUS_GPU>;
1190 clocks = <&ccu CLK_MBUS>,
1191 <&ccu CLK_DRAM>,
1192 <&ccu CLK_BUS_DRAM>;
1205 clocks = <&ccu CLK_BUS_CSI>,
1206 <&ccu CLK_CSI_SCLK>,
1207 <&ccu CLK_DRAM_CSI>;
1209 resets = <&ccu RST_BUS_CSI>;
1219 clocks = <&ccu CLK_BUS_MIPI_DSI>;
1220 resets = <&ccu RST_BUS_MIPI_DSI>;
1239 clocks = <&ccu CLK_BUS_MIPI_DSI>,
1240 <&ccu CLK_DSI_DPHY>;
1242 resets = <&ccu RST_BUS_MIPI_DSI>;
1251 clocks = <&ccu CLK_BUS_DEINTERLACE>,
1252 <&ccu CLK_DEINTERLACE>,
1253 <&ccu CLK_DRAM_DEINTERLACE>;
1255 resets = <&ccu RST_BUS_DEINTERLACE>;
1267 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
1268 <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
1270 resets = <&ccu RST_BUS_HDMI1>;
1297 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
1298 <&ccu CLK_PLL_VIDEO0>;
1300 resets = <&ccu RST_BUS_HDMI0>;
1327 compatible = "allwinner,sun50i-a64-r-ccu";
1330 <&ccu CLK_PLL_PERIPH0>;