Lines Matching full:c1
35 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
38 mcr p15, 0, r0, c1, c0, 0 @ disable caches
58 mrc p15, 0, r2, c1, c0, 0 @ ctrl register
61 mcr p15, 0, r2, c1, c0, 0 @ disable MMU
150 mrc p15, 0, r8, c1, c0, 0 @ Control register
151 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
152 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
183 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
185 mcrne p15, 0, r9, c1, c0, 1 @ No, so write it
186 mcr p15, 0, r10, c1, c0, 2 @ Co-processor access control
238 mrc p15, 1, r6, c15, c1, 0 @ save CP15 - extra features
240 mrc p15, 1, r8, c15, c1, 2 @ save CP15 - Aux Debug Modes Ctrl 2
241 mrc p15, 1, r9, c15, c1, 1 @ save CP15 - Aux Debug Modes Ctrl 1
250 mcr p15, 1, r6, c15, c1, 0 @ restore CP15 - extra features
252 mcr p15, 1, r8, c15, c1, 2 @ restore CP15 - Aux Debug Modes Ctrl 2
253 mcr p15, 1, r9, c15, c1, 1 @ restore CP15 - Aux Debug Modes Ctrl 1
281 * on. Return in r0 the new CP15 C1 control register setting.
311 ALT_SMP(mrc p15, 0, r0, c1, c0, 1)
315 mcrne p15, 0, r10, c1, c0, 1 @ No, update register
330 mrceq p15, 0, r0, c1, c0, 1 @ read aux control register
332 mcreq p15, 0, r0, c1, c0, 1 @ write aux control register
336 mrceq p15, 0, r0, c1, c0, 1 @ read aux control register
339 mcreq p15, 0, r0, c1, c0, 1 @ write aux control register
385 mrcle p15, 0, r0, c1, c0, 1 @ read aux control register
387 mcrle p15, 0, r0, c1, c0, 1 @ write aux control register
460 mrc p15, 1, r0, c15, c1, 1
464 mcr p15, 1, r0, c15, c1, 1
467 mrc p15, 1, r0, c15, c1, 2
470 mcr p15, 1, r0, c15, c1, 2
482 mrc p15, 1, r0, c15, c1, 0
484 mcr p15, 1, r0, c15, c1, 0
538 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
543 mcr p14, 6, r3, c1, c0, 0 @ Initialize TEEHBR to 0
556 mrc p15, 0, r0, c1, c0, 0 @ read control register