Lines Matching full:c1

43 	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
46 	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
62 	mrc	p15, 0, r1, c1, c0, 0		@ ctrl register
64 	mcr	p15, 0, r1, c1, c0, 0		@ disable MMU
153 	mrc	p15, 0, r7, c1, c0, 1	@ auxiliary control register
154 	mrc	p15, 0, r8, c1, c0, 2	@ co-processor access control
155 	mrc	p15, 0, r9, c1, c0, 0	@ control register
177 	mcr	p15, 0, r7, c1, c0, 1	@ auxiliary control register
178 	mcr	p15, 0, r8, c1, c0, 2	@ co-processor access control
193  *	on.  Return in r0 the new CP15 C1 control register setting.
206 	ALT_SMP(mrc	p15, 0, r0, c1, c0, 1)	@ Enable SMP/nAMP mode
209 	ALT_SMP(mcr	p15, 0, r0, c1, c0, 1)
231 	mrc	p15, 0, r0, c1, c0, 0		@ read control register
245 	mrceq	p15, 0, r5, c1, c0, 1		@ load aux control reg
247 	mcreq	p15, 0, r5, c1, c0, 1		@ write aux control reg