Lines Matching +full:entry +full:- +full:address
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-arm926.S: MMU functions for ARM926EJ-S
5 * Copyright (C) 1999-2001 ARM Limited
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
12 * CONFIG_CPU_ARM926_CPU_IDLE -> nohlt
20 #include <asm/pgtable-hwdef.h>
23 #include "proc-macros.S"
27 * using the single invalidate entry instructions. Anything larger
121 * address space.
150 * specified address range.
152 * - start - start address (inclusive)
153 * - end - end address (exclusive)
154 * - flags - vm_flags describing address space
163 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
164 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
166 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
167 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
170 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
171 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
173 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
174 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
188 * region described by start, end. If you have non-snooping
191 * - start - virtual start address
192 * - end - virtual end address
204 * region described by start, end. If you have non-snooping
207 * - start - virtual start address
208 * - end - virtual end address
211 bic r0, r0, #CACHE_DLINESIZE - 1
212 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
213 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
228 * - addr - kernel address
229 * - size - region size
233 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
246 * Invalidate (discard) the specified virtual address range.
251 * - start - virtual start address
252 * - end - virtual end address
258 tst r0, #CACHE_DLINESIZE - 1
259 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
260 tst r1, #CACHE_DLINESIZE - 1
261 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
263 bic r0, r0, #CACHE_DLINESIZE - 1
264 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
274 * Clean the specified virtual address range.
276 * - start - virtual start address
277 * - end - virtual end address
283 bic r0, r0, #CACHE_DLINESIZE - 1
284 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
295 * Clean and invalidate the specified virtual address range.
297 * - start - virtual start address
298 * - end - virtual end address
301 bic r0, r0, #CACHE_DLINESIZE - 1
304 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
306 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
317 * - start - kernel virtual start address
318 * - size - size of region
319 * - dir - DMA direction
331 * - start - kernel virtual start address
332 * - size - size of region
333 * - dir - DMA direction
341 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
390 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
397 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
402 stmfd sp!, {r4 - r6, lr}
406 stmia r0, {r4 - r6}
407 ldmfd sp!, {r4 - r6, pc}
414 ldmia r0, {r4 - r6}
417 mcr p15, 0, r1, c2, c0, 0 @ TTB address
434 mov r0, #4 @ disable write-back on caches explicitly
447 .size __arm926_setup, . - __arm926_setup
461 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
468 string cpu_arm926_name, "ARM926EJ-S"
476 .long 0x41069260 @ ARM926EJ-S (v5TEJ)
497 .size __arm926_proc_info, . - __arm926_proc_info