arm/mm/cache-v7.S

44 	mcr	p15, 2, r0, c0, c0, 0	@ select L1 data cache in CSSELR
46 	mrc	p15, 1, r0, c0, c0, 0	@ read cache geometry from CCSIDR
51 	mov	r2, #1
52 	mov	r3, r3, lsl r1		@ NumWays-1 shifted into bits [31:...]
53 	movs	r1, r2, lsl r1		@ #1 shifted left by same amount
54 	moveq	r1, #1			@ r1 needs value > 0 even if only 1 way
59 1:	movw	ip, #0x7fff
65 	subs	r0, r0, #1		@ Set--
69 	mrc	p15, 1, r0, c0, c0, 0	@ re-read cache geometry from CCSIDR
70 	b	1b
101 	mrc	p15, 1, r0, c0, c0, 1		@ read clidr, r0 = clidr
104 	ands	r3, r3, #7 << 1 		@ extract LoU*2 field from clidr
107 ALT_SMP(mrc	p15, 0, r2, c0, c0, 0)		@ read main ID register
112 	moveq	r3, #1 << 1			@   fix LoUIS value
129 	mrc	p15, 1, r0, c0, c0, 1		@ read clidr
131 	ands	r3, r3, #7 << 1			@ extract LoC*2 from clidr
136 	add	r2, r10, r10, lsr #1		@ work out 3x current cache level
144 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr
146 	mrc	p15, 1, r1, c0, c0, 0		@ read the new csidr
157 	mov	r6, #1
159 	movne	r6, r6, lsl r5			@ 1 shifted left by same amount
167 	subs	r9, r9, #1			@ decrement the index
180 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr
285 	sub	r3, r2, #1
291 1:
292  USER(	mcr	p15, 0, r12, c7, c11, 1	)	@ clean D line to the point of unification
295 	blo	1b
303 	sub	r3, r2, #1
306  USER(	mcr	p15, 0, r12, c7, c5, 1	)	@ invalidate I line
342 	sub	r3, r2, #1
348 1:
349 	mcr	p15, 0, r0, c7, c14, 1		@ clean & invalidate D line / unified line
352 	blo	1b
369 	sub	r3, r2, #1
376 	mcrne	p15, 0, r0, c7, c14, 1		@ clean & invalidate D / U line
381 	mcrne	p15, 0, r1, c7, c14, 1		@ clean & invalidate D / U line
383 1:
384 	mcrlo	p15, 0, r0, c7, c6, 1		@ invalidate D / U line
387 	blo	1b
399 	sub	r3, r2, #1
405 1:
406 	mcr	p15, 0, r0, c7, c10, 1		@ clean D / U line
409 	blo	1b
421 	sub	r3, r2, #1
427 1:
428 	mcr	p15, 0, r0, c7, c14, 1		@ clean & invalidate D / U line
431 	blo	1b