Lines Matching full:bool

10 	bool
25 	bool
44 	bool
62 	bool
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96 	bool
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262 	bool
280 	bool
301 	bool
312 	bool
323 	bool
335 	bool
347 	bool
358 	bool "Accept early Feroceon cores with an ARM926 ID"
368 	bool
373 	bool
378 	bool
393 	bool
408 	bool
425 	bool
434 	bool
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565 	bool
568 	bool
572 	bool
577 	bool
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593 	bool
600 	bool
603 	bool
608 	bool
614 	bool
619 	bool
625 	bool
631 	bool
659 	bool
664 	bool "Support for the Large Physical Address Extension"
682 	bool "Support Thumb user binaries" if !CPU_THUMBONLY && EXPERT
700 	bool "Enable ThumbEE CPU extension"
707 	bool
719 	bool "Emulate SWP/SWPB instructions" if !SMP
750 	bool "Built little-endian kernel"
757 	bool "Build big-endian kernel"
770 	bool
777 	bool
785 	bool "Select the High exception vector"
795 	bool "Disable I-Cache (I-bit)"
802 	bool "Workaround for I-Cache line size mismatch between CPU cores"
810 	bool "Disable D-Cache (C-bit)"
830 	bool "Force write through D-cache"
838 	bool "Round robin I and D cache replacement algorithm"
845 	bool "Disable branch prediction"
851 	bool
855 	bool "Harden the branch predictor against aliasing attacks" if EXPERT
874 	bool "Harden Spectre style attacks against branch history" if EXPERT
884 	bool
892 	bool
895 	bool "Enable kuser helpers in vector page" if !NEED_KUSER_HELPERS
924 	bool "Enable VDSO for acceleration of some system calls"
942 	bool
945 	bool
952 	bool "Enable the Broadcom Brahma-B15 read-ahead cache controller"
960 	bool "Enable the Feroceon L2 cache controller"
968 	bool "Force Feroceon L2 cache write through"
975 	bool
989 	bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
997 	bool "L2x0 performance monitor support" if CACHE_L2X0
1006 	bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1018 	bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1029 	bool "PL310 errata: cache sync operation may be faulty"
1043 	bool "PL310 errata: no automatic Store Buffer drain"
1056 	bool "Enable the Tauros2 L2 cache controller"
1065 	bool "Enable the UniPhier outer cache controller"
1075 	bool "Enable the L2 cache on XScale3"
1083 	bool
1089 	bool
1100 	bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K || CPU_V7M) && !CPU_V7
1123 	bool
1126 	bool "Make rodata strictly non-executable"