Lines Matching +full:1 +full:c0

33 #define CPU_RESETTABLE_SOON	1
39 #define TEGRA_FLUSH_CACHE_ALL	1
44 	add	\rn, \rn, #1
53 	subne	\rd, \rcpu, #1
62 	subne	\rd, \rcpu, #1
70 	mrc	p15, 0, \rd, c0, c0, 5
82 	mrc	p15, 0, \tmp1, c0, c0, 0
90 	mrc	p15, 0, \tmp1, c1, c0, 1	@ ACTLR
91 	bic	\tmp1, \tmp1, #(1<<6) | (1<<0)	@ clear ACTLR.SMP | ACTLR.FW
92 	mcr	p15, 0, \tmp1, c1, c0, 1	@ ACTLR
96 	mrceq	p15, 0, \tmp1, c0, c0, 5