Lines Matching full:r2
41 * r2 : temp storage of register values
49 mrc p15, 0, r2, c15, c0, 0
50 orr r2, r2, #1
51 mcr p15, 0, r2, c15, c0, 0
54 ldr r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
55 orr r2, r2, #SELFRSHREQ_MASK
56 str r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
61 ldr r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]
62 and r2, r2, #SELFRFSHACK_MASK
63 cmp r2, #SELFRFSHACK_MASK
90 ldr r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
91 bic r2, r2, #SELFRSHREQ_MASK
92 str r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
97 ldr r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]
98 and r2, r2, #SELFRFSHACK_MASK
99 cmp r2, #SELFRFSHACK_MASK
116 mrc p15, 0, r2, c15, c0, 0
117 bic r2, r2, #1
118 mcr p15, 0, r2, c15, c0, 0