1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
11 // Samsung - GPIOlib support
16 #include <linux/gpio.h>
31 #include "regs-gpio.h"
32 #include "gpio-samsung.h"
35 #include "gpio-core.h"
36 #include "gpio-cfg.h"
37 #include "gpio-cfg-helpers.h"
43 	void __iomem *reg = chip->base + 0x08;  in samsung_gpio_setpull_updown()
58 	void __iomem *reg = chip->base + 0x08;  in samsung_gpio_getpull_updown()
69 				    unsigned int off, unsigned int cfg)  in samsung_gpio_setcfg_2bit()  argument
71 	void __iomem *reg = chip->base;  in samsung_gpio_setcfg_2bit()
75 	if (samsung_gpio_is_cfg_special(cfg)) {  in samsung_gpio_setcfg_2bit()
76 		cfg &= 0xf;  in samsung_gpio_setcfg_2bit()
77 		if (cfg > 3)  in samsung_gpio_setcfg_2bit()
78 			return -EINVAL;  in samsung_gpio_setcfg_2bit()
80 		cfg <<= shift;  in samsung_gpio_setcfg_2bit()
85 	con |= cfg;  in samsung_gpio_setcfg_2bit()
92  * samsung_gpio_getcfg_2bit - Samsung 2bit style GPIO configuration read.
93  * @chip: The gpio chip that is being configured.
94  * @off: The offset for the GPIO being configured.
106 	con = __raw_readl(chip->base);  in samsung_gpio_getcfg_2bit()
115  * samsung_gpio_setcfg_4bit - Samsung 4bit single register GPIO config.
116  * @chip: The gpio chip that is being configured.
117  * @off: The offset for the GPIO being configured.
118  * @cfg: The configuration value to set.
120  * This helper deal with the GPIO cases where the control register has 4 bits
121  * of control per GPIO, generally in the form of:
132 				    unsigned int off, unsigned int cfg)  in samsung_gpio_setcfg_4bit()  argument
134 	void __iomem *reg = chip->base;  in samsung_gpio_setcfg_4bit()
138 	if (off < 8 && chip->chip.ngpio > 8)  in samsung_gpio_setcfg_4bit()
139 		reg -= 4;  in samsung_gpio_setcfg_4bit()
141 	if (samsung_gpio_is_cfg_special(cfg)) {  in samsung_gpio_setcfg_4bit()
142 		cfg &= 0xf;  in samsung_gpio_setcfg_4bit()
143 		cfg <<= shift;  in samsung_gpio_setcfg_4bit()
148 	con |= cfg;  in samsung_gpio_setcfg_4bit()
155  * samsung_gpio_getcfg_4bit - Samsung 4bit single register GPIO config read.
156  * @chip: The gpio chip that is being configured.
157  * @off: The offset for the GPIO being configured.
159  * The reverse of samsung_gpio_setcfg_4bit(), turning a gpio configuration
169 	void __iomem *reg = chip->base;  in samsung_gpio_getcfg_4bit()
173 	if (off < 8 && chip->chip.ngpio > 8)  in samsung_gpio_getcfg_4bit()
174 		reg -= 4;  in samsung_gpio_getcfg_4bit()
187 	for (; nr_chips > 0; nr_chips--, chipcfg++) {  in samsung_gpiolib_set_cfg()
188 		if (!chipcfg->set_config)  in samsung_gpiolib_set_cfg()
189 			chipcfg->set_config = samsung_gpio_setcfg_4bit;  in samsung_gpiolib_set_cfg()
190 		if (!chipcfg->get_config)  in samsung_gpiolib_set_cfg()
191 			chipcfg->get_config = samsung_gpio_getcfg_4bit;  in samsung_gpiolib_set_cfg()
192 		if (!chipcfg->set_pull)  in samsung_gpiolib_set_cfg()
193 			chipcfg->set_pull = samsung_gpio_setpull_updown;  in samsung_gpiolib_set_cfg()
194 		if (!chipcfg->get_pull)  in samsung_gpiolib_set_cfg()
195 			chipcfg->get_pull = samsung_gpio_getpull_updown;  in samsung_gpiolib_set_cfg()
234  * Default routines for controlling GPIO, based on the original S3C24XX
235  * GPIO functions which deal with the case where each gpio bank of the
238  * base + 0x00: Control register, 2 bits per gpio
239  *	        gpio n: 2 bits starting at (2*n)
240  *		00 = input, 01 = output, others mean special-function
241  * base + 0x04: Data register, 1 bit per gpio
248 	void __iomem *base = ourchip->base;  in samsung_gpiolib_2bit_input()
267 	void __iomem *base = ourchip->base;  in samsung_gpiolib_2bit_output()
292  * The samsung_gpiolib_4bit routines are to control the gpio banks where
293  * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
296  * base + 0x00: Control register, 4 bits per gpio
297  *		gpio n: 4 bits starting at (4*n)
298  *		0000 = input, 0001 = output, others mean special-function
299  * base + 0x04: Data register, 1 bit per gpio
302  * Note, since the data register is one bit per gpio and is at base + 0x4
311 	void __iomem *base = ourchip->base;  in samsung_gpiolib_4bit_input()
315 	if (ourchip->bitmap_gpio_int & BIT(offset))  in samsung_gpiolib_4bit_input()
330 	void __iomem *base = ourchip->base;  in samsung_gpiolib_4bit_output()
355  * The next set of routines are for the case where the GPIO configuration
356  * registers are 4 bits per GPIO but there is more than one register (the
362  * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
363  *		gpio n: 4 bits starting at (4*n)
364  *		0000 = input, 0001 = output, others mean special-function
365  * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
366  *		gpio n: 4 bits starting at (4*n)
367  *		0000 = input, 0001 = output, others mean special-function
368  * base + 0x08: Data register, 1 bit per gpio
373  * the data register at ourchip->base + 0x04.
380 	void __iomem *base = ourchip->base;  in samsung_gpiolib_4bit2_input()
385 		offset -= 8;  in samsung_gpiolib_4bit2_input()
387 		regcon -= 4;  in samsung_gpiolib_4bit2_input()
402 	void __iomem *base = ourchip->base;  in samsung_gpiolib_4bit2_output()
409 		con_offset -= 8;  in samsung_gpiolib_4bit2_output()
411 		regcon -= 4;  in samsung_gpiolib_4bit2_output()
437 	void __iomem *base = ourchip->base;  in samsung_gpiolib_set()
457 	val = __raw_readl(ourchip->base + 0x04);  in samsung_gpiolib_get()
471  * easy gpio to samsung_gpio_chip mapping function. If this is the case, then
484 	gpn = chip->chip.base;  in s3c_gpiolib_track()
485 	for (i = 0; i < chip->chip.ngpio; i++, gpn++) {  in s3c_gpiolib_track()
493  * samsung_gpiolib_add() - add the Samsung gpio_chip.
496  * This is a wrapper to gpiochip_add() that takes our specific gpio chip
504 	struct gpio_chip *gc = &chip->chip;  in samsung_gpiolib_add()
507 	BUG_ON(!chip->base);  in samsung_gpiolib_add()
508 	BUG_ON(!gc->label);  in samsung_gpiolib_add()
509 	BUG_ON(!gc->ngpio);  in samsung_gpiolib_add()
511 	spin_lock_init(&chip->lock);  in samsung_gpiolib_add()
513 	if (!gc->direction_input)  in samsung_gpiolib_add()
514 		gc->direction_input = samsung_gpiolib_2bit_input;  in samsung_gpiolib_add()
515 	if (!gc->direction_output)  in samsung_gpiolib_add()
516 		gc->direction_output = samsung_gpiolib_2bit_output;  in samsung_gpiolib_add()
517 	if (!gc->set)  in samsung_gpiolib_add()
518 		gc->set = samsung_gpiolib_set;  in samsung_gpiolib_add()
519 	if (!gc->get)  in samsung_gpiolib_add()
520 		gc->get = samsung_gpiolib_get;  in samsung_gpiolib_add()
523 	if (chip->pm != NULL) {  in samsung_gpiolib_add()
524 		if (!chip->pm->save || !chip->pm->resume)  in samsung_gpiolib_add()
525 			pr_err("gpio: %s has missing PM functions\n",  in samsung_gpiolib_add()
526 			       gc->label);  in samsung_gpiolib_add()
528 		pr_err("gpio: %s has no PM function\n", gc->label);  in samsung_gpiolib_add()
544 		chip->chip.direction_input = samsung_gpiolib_2bit_input;  in samsung_gpiolib_add_2bit_chips()
545 		chip->chip.direction_output = samsung_gpiolib_2bit_output;  in samsung_gpiolib_add_2bit_chips()
547 		if (!chip->config)  in samsung_gpiolib_add_2bit_chips()
548 			chip->config = &samsung_gpio_cfgs[7];  in samsung_gpiolib_add_2bit_chips()
549 		if (!chip->pm)  in samsung_gpiolib_add_2bit_chips()
550 			chip->pm = __gpio_pm(&samsung_gpio_pm_2bit);  in samsung_gpiolib_add_2bit_chips()
551 		if ((base != NULL) && (chip->base == NULL))  in samsung_gpiolib_add_2bit_chips()
552 			chip->base = base + ((i) * offset);  in samsung_gpiolib_add_2bit_chips()
559  * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
560  * @chip: The gpio chip that is being configured.
561  * @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
563  * This helper deal with the GPIO cases where the control register has 4 bits
564  * of control per GPIO, generally in the form of:
580 		chip->chip.direction_input = samsung_gpiolib_4bit_input;  in samsung_gpiolib_add_4bit_chips()
581 		chip->chip.direction_output = samsung_gpiolib_4bit_output;  in samsung_gpiolib_add_4bit_chips()
583 		if (!chip->config)  in samsung_gpiolib_add_4bit_chips()
584 			chip->config = &samsung_gpio_cfgs[2];  in samsung_gpiolib_add_4bit_chips()
585 		if (!chip->pm)  in samsung_gpiolib_add_4bit_chips()
586 			chip->pm = __gpio_pm(&samsung_gpio_pm_4bit);  in samsung_gpiolib_add_4bit_chips()
587 		if ((base != NULL) && (chip->base == NULL))  in samsung_gpiolib_add_4bit_chips()
588 			chip->base = base + ((i) * 0x20);  in samsung_gpiolib_add_4bit_chips()
590 		chip->bitmap_gpio_int = 0;  in samsung_gpiolib_add_4bit_chips()
599 	for (; nr_chips > 0; nr_chips--, chip++) {  in samsung_gpiolib_add_4bit2_chips()
600 		chip->chip.direction_input = samsung_gpiolib_4bit2_input;  in samsung_gpiolib_add_4bit2_chips()
601 		chip->chip.direction_output = samsung_gpiolib_4bit2_output;  in samsung_gpiolib_add_4bit2_chips()
603 		if (!chip->config)  in samsung_gpiolib_add_4bit2_chips()
604 			chip->config = &samsung_gpio_cfgs[2];  in samsung_gpiolib_add_4bit2_chips()
605 		if (!chip->pm)  in samsung_gpiolib_add_4bit2_chips()
606 			chip->pm = __gpio_pm(&samsung_gpio_pm_4bit);  in samsung_gpiolib_add_4bit2_chips()
616 	return samsung_chip->irq_base + offset;  in samsung_gpiolib_to_irq()
621 	return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;  in s3c64xx_gpiolib_mbank_to_irq()
626 	return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;  in s3c64xx_gpiolib_lbank_to_irq()
630  * GPIO bank summary:
795 	 * Currently there are two drivers that can provide GPIO support for  in samsung_gpiolib_init()
797 	 * pinctrl-samsung driver is used, providing both GPIO and pin control  in samsung_gpiolib_init()
798 	 * interfaces. For legacy (non-DT) platforms this driver is used.  in samsung_gpiolib_init()
828 		return -EINVAL;  in s3c_gpio_cfgpin()
830 	offset = pin - chip->chip.base;  in s3c_gpio_cfgpin()
841 			  unsigned int cfg)  in s3c_gpio_cfgpin_range()  argument
845 	for (; nr > 0; nr--, start++) {  in s3c_gpio_cfgpin_range()
846 		ret = s3c_gpio_cfgpin(start, cfg);  in s3c_gpio_cfgpin_range()
856 			  unsigned int cfg, samsung_gpio_pull_t pull)  in s3c_gpio_cfgall_range()  argument
860 	for (; nr > 0; nr--, start++) {  in s3c_gpio_cfgall_range()
862 		ret = s3c_gpio_cfgpin(start, cfg);  in s3c_gpio_cfgall_range()
878 		return -EINVAL;  in s3c_gpio_setpull()
880 	offset = pin - chip->chip.base;  in s3c_gpio_setpull()