Lines Matching +full:pxa +full:- +full:rtc
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
13 #include "pxa-regs.h"
30 #define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */
31 #define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */
33 #define DCDCSR __REG(0x40F50080) /* DC-DC Controller Status Register */
42 #define AD3ER __REG(0x40f40008) /* Application Subsystem Wake-Up from D3 Enable */
43 #define AD3SR __REG(0x40f4000c) /* Application Subsystem Wake-Up from D3 Status */
44 #define AD2D0ER __REG(0x40f40010) /* Application Subsystem Wake-Up from D2 to D0 Enable */
45 #define AD2D0SR __REG(0x40f40014) /* Application Subsystem Wake-Up from D2 to D0 Status */
46 #define AD2D1ER __REG(0x40f40018) /* Application Subsystem Wake-Up from D2 to D1 Enable */
47 #define AD2D1SR __REG(0x40f4001c) /* Application Subsystem Wake-Up from D2 to D1 Status */
48 #define AD1D0ER __REG(0x40f40020) /* Application Subsystem Wake-Up from D1 to D0 Enable */
49 #define AD1D0SR __REG(0x40f40024) /* Application Subsystem Wake-Up from D1 to D0 Status */
72 * Application Subsystem Wake-Up bits.
74 #define ADXER_WRTC (1 << 31) /* RTC */
104 * AD3R/AD2R/AD1R bits. R2-R5 are only defined for PXA320.