Lines Matching +full:0 +full:x70000
36 #define ORION5X_REGS_PHYS_BASE 0xf1000000
37 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
40 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
41 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
44 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
45 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
48 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
52 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
53 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
56 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
59 #define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000
66 #define ORION5X_DDR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x00000)
67 #define ORION5X_DDR_WINS_BASE (ORION5X_DDR_PHYS_BASE + 0x1500)
68 #define ORION5X_DDR_WINS_SZ (0x10)
69 #define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000)
70 #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000)
71 #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000)
73 #define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100)
74 #define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x0600)
75 #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x1000)
76 #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2000)
77 #define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2000)
78 #define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2100)
79 #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2100)
81 #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000)
82 #define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000)
84 #define ORION5X_BRIDGE_WINS_SZ (0x80)
86 #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000)
88 #define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x40000)
90 #define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x50000)
91 #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x50000)
93 #define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x60900)
94 #define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x60900)
96 #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x70000)
97 #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x70000)
99 #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x80000)
100 #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x80000)
102 #define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x90000)
104 #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0xa0000)
105 #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0xa0000)
110 #define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000)
111 #define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004)
112 #define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050)
113 #define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008)
114 #define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010)
115 #define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c)
116 #define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460)
117 #define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464)
118 #define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c)
119 #define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0)
120 #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0)
121 #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4)
127 #define MV88F5181_DEV_ID 0x5181
132 #define MV88F5182_DEV_ID 0x5182
135 #define MV88F5281_DEV_ID 0x5281
140 #define MV88F6183_DEV_ID 0x6183