arm/mach-omap2/wd_timer.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * OMAP2+ MPU WD_TIMER-specific code
12 #include <linux/platform_data/omap-wd-timer.h>
23  * settings, WDT module is reset during init. This enables the watchdog
24  * timer. Hence it is required to disable the watchdog after the WDT reset
25  * during init. Otherwise the system would reboot as per the default
37 		return -EINVAL;  in omap2_wd_timer_disable()
43 				oh->name, __func__);  in omap2_wd_timer_disable()
44 		return -EINVAL;  in omap2_wd_timer_disable()
60  * omap2_wd_timer_reset - reset and disable the WDTIMER IP block
63  * After the WDTIMER IP blocks are reset on OMAP2/3, we must also take
65  * because the watchdog is re-armed upon OCP softreset.  (On OMAP4,
66  * this behavior was apparently changed and the watchdog is no longer
67  * re-armed after an OCP soft-reset.)  Returns -ETIMEDOUT if the reset
75  * Returns: %0 on success or -errno value on error.
84 	/* Poll on RESETDONE bit */  in omap2_wd_timer_reset()
86 					   oh->class->sysc->syss_offs)  in omap2_wd_timer_reset()
90 	if (oh->class->sysc->srst_udelay)  in omap2_wd_timer_reset()
91 		udelay(oh->class->sysc->srst_udelay);  in omap2_wd_timer_reset()
95 			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);  in omap2_wd_timer_reset()
98 			 oh->name, c);  in omap2_wd_timer_reset()
100 	return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT :  in omap2_wd_timer_reset()