arm/mach-omap2/soc.h

48  * SoC class bits (15xx, 16xx, 24xx, 34xx...)	[07:00]
60 #define GET_OMAP_REVISION()	((omap_rev() >> 8) & 0xff)
140 IS_OMAP_CLASS(24xx, 0x24)
141 IS_OMAP_CLASS(34xx, 0x34)
142 IS_OMAP_CLASS(44xx, 0x44)
143 IS_AM_CLASS(35xx, 0x35)
144 IS_OMAP_CLASS(54xx, 0x54)
145 IS_AM_CLASS(33xx, 0x33)
146 IS_AM_CLASS(43xx, 0x43)
148 IS_TI_CLASS(81xx, 0x81)
149 IS_DRA_CLASS(7xx, 0x7)
331 #define OMAP2420_REV_ES2_0	(OMAP242X_CLASS | (0x1 << 8))
338 #define OMAP3430_REV_ES2_0	(OMAP343X_CLASS | (0x1 << 8))
339 #define OMAP3430_REV_ES2_1	(OMAP343X_CLASS | (0x2 << 8))
340 #define OMAP3430_REV_ES3_0	(OMAP343X_CLASS | (0x3 << 8))
341 #define OMAP3430_REV_ES3_1	(OMAP343X_CLASS | (0x4 << 8))
342 #define OMAP3430_REV_ES3_1_2	(OMAP343X_CLASS | (0x5 << 8))
346 #define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (0x1 << 8))
347 #define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (0x2 << 8))
351 #define TI8168_REV_ES1_1	(TI816X_CLASS | (0x1 << 8))
352 #define TI8168_REV_ES2_0	(TI816X_CLASS | (0x2 << 8))
353 #define TI8168_REV_ES2_1	(TI816X_CLASS | (0x3 << 8))
357 #define TI8148_REV_ES2_0	(TI814X_CLASS | (0x1 << 8))
358 #define TI8148_REV_ES2_1	(TI814X_CLASS | (0x2 << 8))
362 #define AM35XX_REV_ES1_1	(AM35XX_CLASS | (0x1 << 8))
366 #define AM335X_REV_ES2_0	(AM335X_CLASS | (0x1 << 8))
367 #define AM335X_REV_ES2_1	(AM335X_CLASS | (0x2 << 8))
370 #define AM437X_REV_ES1_0	(AM437X_CLASS | (0x10 << 8))
371 #define AM437X_REV_ES1_1	(AM437X_CLASS | (0x11 << 8))
372 #define AM437X_REV_ES1_2	(AM437X_CLASS | (0x12 << 8))
375 #define OMAP4430_REV_ES1_0	(OMAP443X_CLASS | (0x10 << 8))
376 #define OMAP4430_REV_ES2_0	(OMAP443X_CLASS | (0x20 << 8))
377 #define OMAP4430_REV_ES2_1	(OMAP443X_CLASS | (0x21 << 8))
378 #define OMAP4430_REV_ES2_2	(OMAP443X_CLASS | (0x22 << 8))
379 #define OMAP4430_REV_ES2_3	(OMAP443X_CLASS | (0x23 << 8))
382 #define OMAP4460_REV_ES1_0	(OMAP446X_CLASS | (0x10 << 8))
383 #define OMAP4460_REV_ES1_1	(OMAP446X_CLASS | (0x11 << 8))
386 #define OMAP4470_REV_ES1_0	(OMAP447X_CLASS | (0x10 << 8))
389 #define OMAP5430_REV_ES2_0	(OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
390 #define OMAP5432_REV_ES2_0	(OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
393 #define DRA762_REV_ES1_0	(DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
396 #define DRA752_REV_ES1_0	(DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
397 #define DRA752_REV_ES1_1	(DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
398 #define DRA752_REV_ES2_0	(DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
399 #define DRA722_REV_ES1_0	(DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
400 #define DRA722_REV_ES2_0	(DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))
401 #define DRA722_REV_ES2_1	(DRA7XX_CLASS | (0x22 << 16) | (0x21 << 8))
433 #define OMAP3_HAS_IO_CHAIN_CTRL		BIT(8)