Lines Matching +full:1 +full:c0
47 * 1 - CPUx L1 and logic lost: MPUSS CSWR
88 mrc p15, 0, r0, c1, c0, 0
89 bic r0, r0, #(1 << 2) @ Disable the C bit
90 mcr p15, 0, r0, c1, c0, 0
108 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
119 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
127 tst r0, #(1 << 18)
128 mrcne p15, 0, r0, c1, c0, 1
129 bicne r0, r0, #(1 << 6) @ Disable SMP bit
130 mcrne p15, 0, r0, c1, c0, 1
146 mrc p15, 0, r5, c0, c0, 5 @ Read MPIDR
189 mrc p15, 0, r0, c1, c0, 0
190 tst r0, #(1 << 2) @ Check C bit enabled?
191 orreq r0, r0, #(1 << 2) @ Enable the C bit
192 mcreq p15, 0, r0, c1, c0, 0
201 mrc p15, 0, r0, c1, c0, 1
202 tst r0, #(1 << 6) @ Check SMP bit enabled?
203 orreq r0, r0, #(1 << 6)
204 mcreq p15, 0, r0, c1, c0, 1
253 mrc p15, 0, r0, c0, c0, 5
270 mrc p15, 0, r0, c1, c0, 1
271 tst r0, #(1 << 6) @ Check SMP bit enabled?
272 orreq r0, r0, #(1 << 6)
273 mcreq p15, 0, r0, c1, c0, 1
288 cmp r0, #1
388 .word 1, 0