Lines Matching +full:0 +full:x0b00

14 #define AM33XX_PRM_BASE               0x44E00000
21 #define AM33XX_PRM_OCP_SOCKET_MOD	0x0B00
22 #define AM33XX_PRM_PER_MOD		0x0C00
23 #define AM33XX_PRM_WKUP_MOD		0x0D00
24 #define AM33XX_PRM_MPU_MOD		0x0E00
25 #define AM33XX_PRM_DEVICE_MOD		0x0F00
26 #define AM33XX_PRM_RTC_MOD		0x1000
27 #define AM33XX_PRM_GFX_MOD		0x1100
28 #define AM33XX_PRM_CEFUSE_MOD		0x1200
31 #define AM33XX_PM_PER_PWRSTST_OFFSET		0x0008
32 #define AM33XX_PM_PER_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008)
33 #define AM33XX_PM_PER_PWRSTCTRL_OFFSET		0x000c
34 #define AM33XX_PM_PER_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x000c)
37 #define AM33XX_PM_WKUP_PWRSTCTRL_OFFSET		0x0004
38 #define AM33XX_PM_WKUP_PWRSTCTRL		AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0004)
39 #define AM33XX_PM_WKUP_PWRSTST_OFFSET		0x0008
40 #define AM33XX_PM_WKUP_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0008)
43 #define AM33XX_PM_MPU_PWRSTCTRL_OFFSET		0x0000
44 #define AM33XX_PM_MPU_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000)
45 #define AM33XX_PM_MPU_PWRSTST_OFFSET		0x0004
46 #define AM33XX_PM_MPU_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0004)
49 #define AM33XX_PRM_RSTCTRL_OFFSET		0x0000
50 #define AM33XX_PRM_RSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000)
53 #define AM33XX_PM_RTC_PWRSTCTRL_OFFSET		0x0000
54 #define AM33XX_PM_RTC_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000)
55 #define AM33XX_PM_RTC_PWRSTST_OFFSET		0x0004
56 #define AM33XX_PM_RTC_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0004)
59 #define AM33XX_PM_GFX_PWRSTCTRL_OFFSET		0x0000
60 #define AM33XX_PM_GFX_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000)
61 #define AM33XX_PM_GFX_PWRSTST_OFFSET		0x0010
62 #define AM33XX_PM_GFX_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0010)
65 #define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET	0x0000
66 #define AM33XX_PM_CEFUSE_PWRSTCTRL		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000)
67 #define AM33XX_PM_CEFUSE_PWRSTST_OFFSET		0x0004
68 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)