Lines Matching +full:0 +full:x0600
24 #define OMAP54XX_PRCM_MPU_BASE 0x48243000
30 #define OMAP54XX_PRCM_MPU_OCP_SOCKET_INST 0x0000
31 #define OMAP54XX_PRCM_MPU_DEVICE_INST 0x0200
32 #define OMAP54XX_PRCM_MPU_PRM_C0_INST 0x0400
33 #define OMAP54XX_PRCM_MPU_CM_C0_INST 0x0600
34 #define OMAP54XX_PRCM_MPU_PRM_C1_INST 0x0800
35 #define OMAP54XX_PRCM_MPU_CM_C1_INST 0x0a00
38 #define OMAP54XX_PRCM_MPU_CM_C0_CPU0_CDOFFS 0x0000
39 #define OMAP54XX_PRCM_MPU_CM_C1_CPU1_CDOFFS 0x0000
52 #define OMAP54XX_REVISION_PRCM_MPU_OFFSET 0x0000
55 #define OMAP54XX_PRCM_MPU_PRM_RSTST_OFFSET 0x0000
56 #define OMAP54XX_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004
57 #define OMAP54XX_PRM_FRAC_INCREMENTER_NUMERATOR_OFFSET 0x0010
58 #define OMAP54XX_PRM_FRAC_INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x0014
61 #define OMAP54XX_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
62 #define OMAP54XX_PM_CPU0_PWRSTST_OFFSET 0x0004
63 #define OMAP54XX_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x0010
64 #define OMAP54XX_RM_CPU0_CPU0_RSTST_OFFSET 0x0014
65 #define OMAP54XX_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0024
68 #define OMAP54XX_CM_CPU0_CLKSTCTRL_OFFSET 0x0000
69 #define OMAP54XX_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0020
70 #define OMAP54XX_CM_CPU0_CPU0_CLKCTRL OMAP54XX_PRCM_MPU_REGADDR(OMAP54XX_PRCM_MPU_CM_C0_INST, 0x…
73 #define OMAP54XX_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
74 #define OMAP54XX_PM_CPU1_PWRSTST_OFFSET 0x0004
75 #define OMAP54XX_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x0010
76 #define OMAP54XX_RM_CPU1_CPU1_RSTST_OFFSET 0x0014
77 #define OMAP54XX_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0024
80 #define OMAP54XX_CM_CPU1_CLKSTCTRL_OFFSET 0x0000
81 #define OMAP54XX_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0020
82 #define OMAP54XX_CM_CPU1_CPU1_CLKCTRL OMAP54XX_PRCM_MPU_REGADDR(OMAP54XX_PRCM_MPU_CM_C1_INST, 0x…