Lines Matching +full:0 +full:x0e00
22 #define OCP_MOD 0x000
23 #define MPU_MOD 0x100
24 #define CORE_MOD 0x200
25 #define GFX_MOD 0x300
26 #define WKUP_MOD 0x400
27 #define PLL_MOD 0x500
32 #define OMAP24XX_DSP_MOD 0x800
34 #define OMAP2430_MDM_MOD 0xc00
37 #define OMAP3430_IVA2_MOD -0x800
40 #define OMAP3430_DSS_MOD 0x600
41 #define OMAP3430_CAM_MOD 0x700
42 #define OMAP3430_PER_MOD 0x800
43 #define OMAP3430_EMU_MOD 0x900
44 #define OMAP3430_GR_MOD 0xa00
45 #define OMAP3430_NEON_MOD 0xb00
46 #define OMAP3430ES2_USBHOST_MOD 0xc00
51 #define TI814X_PRM_DSP_MOD 0x0a00
52 #define TI814X_PRM_HDVICP_MOD 0x0c00
53 #define TI814X_PRM_ISP_MOD 0x0d00
54 #define TI814X_PRM_HDVPSS_MOD 0x0e00
55 #define TI814X_PRM_GFX_MOD 0x0f00
57 #define TI81XX_PRM_DEVICE_MOD 0x0000
58 #define TI816X_PRM_ACTIVE_MOD 0x0a00
59 #define TI81XX_PRM_DEFAULT_MOD 0x0b00
60 #define TI816X_PRM_IVAHD0_MOD 0x0c00
61 #define TI816X_PRM_IVAHD1_MOD 0x0d00
62 #define TI816X_PRM_IVAHD2_MOD 0x0e00
63 #define TI816X_PRM_SGX_MOD 0x0f00
64 #define TI81XX_PRM_ALWON_MOD 0x1800
119 #define OMAP24XX_EN_USB_SHIFT 0
120 #define OMAP24XX_EN_USB_MASK (1 << 0)
185 #define OMAP24XX_ST_USB_SHIFT 0
186 #define OMAP24XX_ST_USB_MASK (1 << 0)
191 #define OMAP24XX_EN_GPT1_SHIFT 0
192 #define OMAP24XX_EN_GPT1_MASK (1 << 0)
199 #define OMAP24XX_ST_GPT1_SHIFT 0
200 #define OMAP24XX_ST_GPT1_MASK (1 << 0)
203 #define OMAP2430_ST_MDM_SHIFT 0
204 #define OMAP2430_ST_MDM_MASK (1 << 0)
210 #define OMAP3430_REV_SHIFT 0
211 #define OMAP3430_REV_MASK (0xff << 0)
214 #define OMAP3430_AUTOIDLE_MASK (1 << 0)
309 #define OMAP3430_EN_GPT1_MASK (1 << 0)
310 #define OMAP3430_EN_GPT1_SHIFT 0
333 #define OMAP3430_ST_GPT1_SHIFT 0
334 #define OMAP3430_ST_GPT1_MASK (1 << 0)
384 #define OMAP3430_EN_MCBSP2_MASK (1 << 0)
385 #define OMAP3430_EN_MCBSP2_SHIFT 0
420 #define OMAP3430_EN_CORE_SHIFT 0
421 #define OMAP3430_EN_CORE_MASK (1 << 0)
449 for (index = 0; index < timeout; index++) { \