Lines Matching +full:0 +full:x3a
23 #define OMAP3_SRI2C_SLAVE_ADDR 0x12
24 #define OMAP3_VDD_MPU_SR_CONTROL_REG 0x00
25 #define OMAP3_VDD_CORE_SR_CONTROL_REG 0x01
26 #define OMAP3_VP_CONFIG_ERROROFFSET 0x00
27 #define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1
28 #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
31 #define OMAP4_SRI2C_SLAVE_ADDR 0x12
32 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
33 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56
34 #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
35 #define OMAP4_VDD_IVA_SR_CMD_REG 0x5C
36 #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
37 #define OMAP4_VDD_CORE_SR_CMD_REG 0x62
42 #define REG_SMPS_OFFSET 0xE0
60 * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse in twl6030_vsel_to_uv()
61 * is programmed to all 0's where as starting from in twl6030_vsel_to_uv()
71 return 0; in twl6030_vsel_to_uv()
79 if (vsel == 0x3A) in twl6030_vsel_to_uv()
82 if (smps_offset & 0x8) in twl6030_vsel_to_uv()
94 * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse in twl6030_uv_to_vsel()
95 * is programmed to all 0's where as starting from in twl6030_uv_to_vsel()
105 return 0x00; in twl6030_uv_to_vsel()
113 if (uv > twl6030_vsel_to_uv(0x39)) { in twl6030_uv_to_vsel()
115 return 0x3A; in twl6030_uv_to_vsel()
117 __func__, uv, twl6030_vsel_to_uv(0x39)); in twl6030_uv_to_vsel()
118 return 0x3A; in twl6030_uv_to_vsel()
121 if (smps_offset & 0x8) in twl6030_uv_to_vsel()
165 .vddmin = 0,
183 .vddmin = 0,
201 .vddmin = 0,
230 return 0; in omap4_twl_init()
246 return 0; in omap3_twl_init()