Lines Matching +full:serial +full:- +full:clk +full:- +full:low
1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
5 * Copyright (C) 2009-2011 Nokia Corporation
12 * XXX these should be marked initdata for multi-OMAP kernels
15 #include <linux/platform_data/i2c-omap.h>
17 #include <linux/platform_data/hsmmc-omap.h>
25 #include "prm-regbits-34xx.h"
26 #include "cm-regbits-34xx.h"
36 * is driver-specific or driver-kernel integration-specific belongs
286 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
415 { .role = "softreset_uart1_fck", .clk = "uart1_fck" },
446 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
447 { .role = "tv_clk", .clk = "dss_tv_fck" },
449 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
520 * display serial interface controller
541 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
559 { .role = "ick", .clk = "dss_ick" },
578 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
663 { .role = "dbclk", .clk = "gpio1_dbck", },
684 { .role = "dbclk", .clk = "gpio2_dbck", },
705 { .role = "dbclk", .clk = "gpio3_dbck", },
726 { .role = "dbclk", .clk = "gpio4_dbck", },
748 { .role = "dbclk", .clk = "gpio5_dbck", },
770 { .role = "dbclk", .clk = "gpio6_dbck", },
791 * multi channel buffered serial port controller
795 .rev_offs = -ENODEV,
810 { .role = "pad_fck", .clk = "mcbsp_clks" },
811 { .role = "prcm_fck", .clk = "core_96m_fck" },
815 { .role = "pad_fck", .clk = "mcbsp_clks" },
816 { .role = "prcm_fck", .clk = "per_96m_fck" },
901 .rev_offs = -ENODEV,
930 .rev_offs = -ENODEV,
942 .rev_offs = -ENODEV,
1027 * mailbox module allowing communication between the on-chip processors
1028 * using a queued mailbox-interrupt mechanism.
1061 * multichannel serial port interface (mcspi) / master/slave synchronous serial
1159 { .role = "dbck", .clk = "omap_32k_fck", },
1209 { .role = "dbck", .clk = "omap_32k_fck", },
1253 { .role = "dbck", .clk = "omap_32k_fck", },
1273 * high-speed multi-port usb host controller
1309 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
1314 * - USBHOST module is set to smart-idle mode
1315 * - PRCM asserts idle_req to the USBHOST module ( This typically
1316 * happens when the system is going to a low power mode : all ports
1319 * - an USBHOST interrupt occurs before the module is able to answer
1329 * Errata: USB host EHCI may stall when entering smart-standby mode
1333 * When the USBHOST module is set to smart-standby mode, and when it is
1455 /* L3 -> L4_CORE interface */
1462 /* L3 -> L4_PER interface */
1470 /* MPU -> L3 interface */
1478 /* l3 -> debugss */
1485 /* DSS -> l3 */
1504 /* l3_core -> sad2d interface */
1508 .clk = "core_l3_ick",
1512 /* L4_CORE -> L4_WKUP interface */
1519 /* L4 CORE -> MMC1 interface */
1523 .clk = "mmchs1_ick",
1531 .clk = "mmchs1_ick",
1536 /* L4 CORE -> MMC2 interface */
1540 .clk = "mmchs2_ick",
1548 .clk = "mmchs2_ick",
1553 /* L4 CORE -> MMC3 interface */
1558 .clk = "mmchs3_ick",
1563 /* L4 CORE -> UART1 interface */
1568 .clk = "uart1_ick",
1572 /* L4 CORE -> UART2 interface */
1577 .clk = "uart2_ick",
1581 /* L4 PER -> UART3 interface */
1586 .clk = "uart3_ick",
1590 /* L4 PER -> UART4 interface */
1595 .clk = "uart4_ick",
1599 /* AM35xx: L4 CORE -> UART4 interface */
1604 .clk = "uart4_ick",
1608 /* L4 CORE -> I2C1 interface */
1612 .clk = "i2c1_ick",
1623 /* L4 CORE -> I2C2 interface */
1627 .clk = "i2c2_ick",
1638 /* L4 CORE -> I2C3 interface */
1643 .clk = "i2c3_ick",
1654 /* L4 CORE -> SR1 interface */
1658 .clk = "sr_l4_ick",
1665 .clk = "sr_l4_ick",
1669 /* L4 CORE -> SR2 interface */
1674 .clk = "sr_l4_ick",
1681 .clk = "sr_l4_ick",
1685 /* L4_WKUP -> L4_SEC interface */
1692 /* IVA2 <- L3 interface */
1696 .clk = "core_l3_ick",
1700 /* l4_per -> timer3 */
1704 .clk = "gpt3_ick",
1709 /* l4_per -> timer4 */
1713 .clk = "gpt4_ick",
1718 /* l4_per -> timer5 */
1722 .clk = "gpt5_ick",
1727 /* l4_per -> timer6 */
1731 .clk = "gpt6_ick",
1736 /* l4_per -> timer7 */
1740 .clk = "gpt7_ick",
1745 /* l4_per -> timer8 */
1749 .clk = "gpt8_ick",
1754 /* l4_per -> timer9 */
1758 .clk = "gpt9_ick",
1762 /* l4_core -> timer10 */
1766 .clk = "gpt10_ick",
1770 /* l4_core -> timer11 */
1774 .clk = "gpt11_ick",
1778 /* l4_wkup -> wd_timer2 */
1783 .clk = "wdt2_ick",
1787 /* l4_core -> dss */
1791 .clk = "dss_ick",
1805 .clk = "dss_ick",
1816 /* l4_core -> dss_dispc */
1820 .clk = "dss_ick",
1831 /* l4_core -> dss_dsi1 */
1835 .clk = "dss_ick",
1846 /* l4_core -> dss_rfbi */
1850 .clk = "dss_ick",
1861 /* l4_core -> dss_venc */
1865 .clk = "dss_ick",
1877 /* l4_wkup -> gpio1 */
1885 /* l4_per -> gpio2 */
1893 /* l4_per -> gpio3 */
1925 /* l4_core -> mmu isp */
1947 /* l3_main -> iva mmu */
1971 /* l4_per -> gpio4 */
1979 /* l4_per -> gpio5 */
1987 /* l4_per -> gpio6 */
1995 /* l4_core -> mcbsp1 */
1999 .clk = "mcbsp1_ick",
2004 /* l4_per -> mcbsp2 */
2008 .clk = "mcbsp2_ick",
2013 /* l4_per -> mcbsp3 */
2017 .clk = "mcbsp3_ick",
2022 /* l4_per -> mcbsp4 */
2026 .clk = "mcbsp4_ick",
2031 /* l4_core -> mcbsp5 */
2035 .clk = "mcbsp5_ick",
2040 /* l4_per -> mcbsp2_sidetone */
2044 .clk = "mcbsp2_ick",
2049 /* l4_per -> mcbsp3_sidetone */
2053 .clk = "mcbsp3_ick",
2057 /* l4_core -> mailbox */
2064 /* l4 core -> mcspi1 interface */
2068 .clk = "mcspi1_ick",
2072 /* l4 core -> mcspi2 interface */
2076 .clk = "mcspi2_ick",
2080 /* l4 core -> mcspi3 interface */
2084 .clk = "mcspi3_ick",
2088 /* l4 core -> mcspi4 interface */
2093 .clk = "mcspi4_ick",
2100 .clk = "core_l3_ick",
2108 .clk = "usbhost_ick",
2116 .clk = "usbtll_ick",
2120 /* l4_core -> hdq1w interface */
2124 .clk = "hdq_ick",
2143 * so is left as a future to-do item.
2148 .clk = "emac_fck",
2152 /* l4_core -> davinci mdio */
2156 * so is left as a future to-do item.
2161 .clk = "emac_fck",
2175 * https://lore.kernel.org/all/1336770778-23044-3-git-send-email-mgreer@animalcreek.com/
2180 /* l3_core -> davinci emac interface */
2184 * so is left as a future to-do item.
2189 .clk = "emac_ick",
2193 /* l4_core -> davinci emac */
2197 * so is left as a future to-do item.
2202 .clk = "emac_ick",
2209 .clk = "core_l3_ick",
2213 /* l4_core -> SHAM2 (SHA1/MD5) (similar to omap24xx) */
2247 .clk = "sha12_ick",
2253 * synchronous serial interface (multichannel and full-duplex serial if)
2285 /* L4 CORE -> SSI */
2289 .clk = "ssi_ick",
2362 /* 3430ES1-only hwmod links */
2369 /* 3430ES2+-only hwmod links */
2379 /* <= 3430ES3-only hwmod links */
2386 /* 3430ES3+-only hwmod links */
2393 /* 34xx-only hwmod links (all ES revisions) */
2407 /* 36xx-only hwmod links (all ES revisions) */
2455 * omap3xxx_hwmod_is_hs_ip_block_usable - is a security IP block accessible?
2456 * @bus: struct device_node * for the top-level OMAP DT data
2463 * fused as a 'general-purpose' SoC. If however DT data is present,
2522 return -EINVAL; in omap3xxx_hwmod_init()
2585 * long-term fix to this is to ensure hwmods are set up in in omap3xxx_hwmod_init()