Lines Matching +full:non +full:- +full:core

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  * Copyright (C) 2009-2014 Texas Instruments, Inc.
21 /* Physical address needed since MMU not enabled yet on secondary core */
38  * secondary core is held until we're ready for it to initialise.
39  * The primary core will update this flag using a hardware
58 	.arch armv7-a
77  * secondary core is held until we're ready for it to initialise.
78  * The primary core will update this flag using a hardware
93 	 * should now contain the SVC stack for this core
113 	 * bit 1 == Non-Secure Enable
114 	 * The Non-Secure banked register has not changed
116 	 * GIC restoration will cause a problem to CPU0 Non-Secure SW.
120 	 * 2) CPU1 must re-enable the GIC distributor on
130 	 * should now contain the SVC stack for this core