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23 #define DRA7XX_CM_CORE_BASE		0x4a008000
29 #define DRA7XX_CM_CORE_OCP_SOCKET_INST	0x0000
30 #define DRA7XX_CM_CORE_CKGEN_INST	0x0104
31 #define DRA7XX_CM_CORE_COREAON_INST	0x0600
32 #define DRA7XX_CM_CORE_CORE_INST	0x0700
33 #define DRA7XX_CM_CORE_IVA_INST		0x0f00
34 #define DRA7XX_CM_CORE_CAM_INST		0x1000
35 #define DRA7XX_CM_CORE_DSS_INST		0x1100
36 #define DRA7XX_CM_CORE_GPU_INST		0x1200
37 #define DRA7XX_CM_CORE_L3INIT_INST	0x1300
38 #define DRA7XX_CM_CORE_CUSTEFUSE_INST	0x1600
39 #define DRA7XX_CM_CORE_L4PER_INST	0x1700
42 #define DRA7XX_CM_CORE_COREAON_COREAON_CDOFFS		0x0000
43 #define DRA7XX_CM_CORE_CORE_L3MAIN1_CDOFFS		0x0000
44 #define DRA7XX_CM_CORE_CORE_IPU2_CDOFFS			0x0200
45 #define DRA7XX_CM_CORE_CORE_DMA_CDOFFS			0x0300
46 #define DRA7XX_CM_CORE_CORE_EMIF_CDOFFS			0x0400
47 #define DRA7XX_CM_CORE_CORE_ATL_CDOFFS			0x0520
48 #define DRA7XX_CM_CORE_CORE_L4CFG_CDOFFS		0x0600
49 #define DRA7XX_CM_CORE_CORE_L3INSTR_CDOFFS		0x0700
50 #define DRA7XX_CM_CORE_IVA_IVA_CDOFFS			0x0000
51 #define DRA7XX_CM_CORE_CAM_CAM_CDOFFS			0x0000
52 #define DRA7XX_CM_CORE_DSS_DSS_CDOFFS			0x0000
53 #define DRA7XX_CM_CORE_GPU_GPU_CDOFFS			0x0000
54 #define DRA7XX_CM_CORE_L3INIT_L3INIT_CDOFFS		0x0000
55 #define DRA7XX_CM_CORE_L3INIT_PCIE_CDOFFS		0x00a0
56 #define DRA7XX_CM_CORE_L3INIT_GMAC_CDOFFS		0x00c0
57 #define DRA7XX_CM_CORE_CUSTEFUSE_CUSTEFUSE_CDOFFS	0x0000
58 #define DRA7XX_CM_CORE_L4PER_L4PER_CDOFFS		0x0000
59 #define DRA7XX_CM_CORE_L4PER_L4SEC_CDOFFS		0x0180
60 #define DRA7XX_CM_CORE_L4PER_L4PER2_CDOFFS		0x01fc
61 #define DRA7XX_CM_CORE_L4PER_L4PER3_CDOFFS		0x0210