Lines Matching +full:3 +full:- +full:9
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
41 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
44 MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0)
50 MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
53 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
54 MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1)
56 MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1)
57 MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1)
58 MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1)
59 MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1)
63 MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1)
64 MUX_CFG("W13_1610_USB1_SE0", 9, 0, 4, 1, 28, 0, NA, 0, 1)
65 MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1)
66 MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1)
67 MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1)
69 MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1)
75 MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1)
77 MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1)
78 MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1)
79 MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1)
80 MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1)
81 MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1)
83 /* OMAP-1510 GPIO */
84 MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1)
86 MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1)
92 /* OMAP-1710 GPIO */
93 MUX_CFG("R18_1710_GPIO0", 7, 9, 0, 1, 11, 1, 1, 1, 1)
94 MUX_CFG("V2_1710_GPIO10", F, 27, 1, 4, 3, 1, 4, 1, 1)
95 MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1)
96 MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1)
104 MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1)
105 MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1)
107 MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1)
110 MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1)
111 MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1)
112 MUX_CFG("E19_1610_MPUIO15", 3, 18, 1, 0, 6, 0, 0, 0, 1)
116 MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1)
120 MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1)
123 MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
129 /* OMAP-1610 MMC2 */
132 MUX_CFG("W15_1610_MMC2_DAT2", 9, 12, 6, 2, 5, 1, 2, 1, 1)
134 MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1)
139 MUX_CFG("R18_1610_MMC2_CLKIN", 7, 9, 6, 1, 11, 0, 1, 11, 1)
141 /* OMAP-1610 External Trace Interface */
157 MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1)
160 MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0)
161 MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0)
162 MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0)
164 /* OMAP-1610 uWire */
167 MUX_CFG("W21_1610_UWIRE_SDO", 8, 3, 0, 1, 19, 0, 1, 1, 1)
168 MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1)
172 /* OMAP-1610 SPI */
176 MUX_CFG("W21_1610_SPIF_DOUT", 8, 3, 6, 1, 19, 0, 1, 0, 1)
177 MUX_CFG("R18_1610_SPIF_DOUT", 7, 9, 3, 1, 11, 0, 1, 0, 1)
178 MUX_CFG("N14_1610_SPIF_CS0", 8, 9, 6, 1, 21, 0, 1, 1, 1)
181 MUX_CFG("P15_1610_SPIF_CS3", 8, 12, 3, 1, 22, 0, 1, 1, 1)
183 /* OMAP-1610 Flash */
185 MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1)
193 MUX_CFG("MMC_DAT3", 10, 15, 0, 3, 8, 1, 3, 1, 1)
198 /* OMAP-1610 USB0 alternate configuration */
199 MUX_CFG("W9_USB0_TXEN", B, 9, 5, 2, 19, 0, 2, 0, 1)
201 MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1)
202 MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1)
203 MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1)
204 MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1)
206 MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1)
209 MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1)
218 MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1)
219 MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1)
220 MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1)
221 MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1)
222 MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1)
229 MUX_CFG("F18_1610_KBC0", 3, 15, 0, 0, 5, 1, 0, 0, 0)
230 MUX_CFG("D20_1610_KBC1", 3, 12, 0, 0, 4, 1, 0, 0, 0)
231 MUX_CFG("D19_1610_KBC2", 3, 9, 0, 0, 3, 1, 0, 0, 0)
232 MUX_CFG("E18_1610_KBC3", 3, 6, 0, 0, 2, 1, 0, 0, 0)
233 MUX_CFG("C21_1610_KBC4", 3, 3, 0, 0, 1, 1, 0, 0, 0)
235 MUX_CFG("F19_1610_KBR1", 3, 27, 0, 0, 9, 1, 0, 1, 0)
236 MUX_CFG("H14_1610_KBR2", 3, 24, 0, 0, 8, 1, 0, 1, 0)
237 MUX_CFG("E20_1610_KBR3", 3, 21, 0, 0, 7, 1, 0, 1, 0)
238 MUX_CFG("E19_1610_KBR4", 3, 18, 0, 0, 6, 1, 0, 1, 0)
251 MUX_CFG("P11_1610_CF_CD2", A, 27, 3, 2, 15, 1, 2, 1, 1)
252 MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1)
253 MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1)
254 MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1)
255 MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1)
261 MUX_CFG("J14_1610_CAM_D5", 5, 3, 0, 0, 21, 1, 0, 0, 0)
263 MUX_CFG("K19_1610_CAM_D3", 5, 9, 0, 0, 23, 1, 0, 0, 0)
276 MUX_CFG("W13_1610_CCP_CLKM", 9, 0, 6, 1, 28, 1, 1, 0, 0)
277 MUX_CFG("W14_1610_CCP_DATAP", 9, 24, 6, 2, 4, 1, 2, 0, 0)
278 MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0)
295 if (cfg->mux_reg) { in omap1_cfg_reg()
299 reg_orig = omap_readl(cfg->mux_reg); in omap1_cfg_reg()
301 /* The mux registers always seem to be 3 bits long */ in omap1_cfg_reg()
302 mask = (0x7 << cfg->mask_offset); in omap1_cfg_reg()
306 tmp2 = (cfg->mask << cfg->mask_offset); in omap1_cfg_reg()
312 omap_writel(reg, cfg->mux_reg); in omap1_cfg_reg()
318 if (cfg->pu_pd_reg && cfg->pull_val) { in omap1_cfg_reg()
320 pu_pd_orig = omap_readl(cfg->pu_pd_reg); in omap1_cfg_reg()
321 mask = 1 << cfg->pull_bit; in omap1_cfg_reg()
323 if (cfg->pu_pd_val) { in omap1_cfg_reg()
334 omap_writel(pu_pd, cfg->pu_pd_reg); in omap1_cfg_reg()
340 if (cfg->pull_reg) { in omap1_cfg_reg()
342 pull_orig = omap_readl(cfg->pull_reg); in omap1_cfg_reg()
343 mask = 1 << cfg->pull_bit; in omap1_cfg_reg()
345 if (cfg->pull_val) { in omap1_cfg_reg()
357 omap_writel(pull, cfg->pull_reg); in omap1_cfg_reg()
363 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); in omap1_cfg_reg()
368 if (cfg->debug || warn) { in omap1_cfg_reg()
369 printk("MUX: Setting register %s\n", cfg->name); in omap1_cfg_reg()
370 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", in omap1_cfg_reg()
371 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); in omap1_cfg_reg()
374 if (cfg->pu_pd_reg && cfg->pull_val) { in omap1_cfg_reg()
375 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", in omap1_cfg_reg()
376 cfg->pu_pd_name, cfg->pu_pd_reg, in omap1_cfg_reg()
381 if (cfg->pull_reg) in omap1_cfg_reg()
382 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", in omap1_cfg_reg()
383 cfg->pull_name, cfg->pull_reg, pull_orig, pull); in omap1_cfg_reg()
388 return warn ? -ETXTBSY : 0; in omap1_cfg_reg()
398 if (!arch_mux_cfg || !arch_mux_cfg->pins || arch_mux_cfg->size == 0 in omap_mux_register()
399 || !arch_mux_cfg->cfg_reg) { in omap_mux_register()
401 return -EINVAL; in omap_mux_register()
420 return -EINVAL; in omap_cfg_reg()
425 return -ENODEV; in omap_cfg_reg()
428 if (index >= mux_cfg->size) { in omap_cfg_reg()
430 index, mux_cfg->size); in omap_cfg_reg()
432 return -ENODEV; in omap_cfg_reg()
435 reg = &mux_cfg->pins[index]; in omap_cfg_reg()
437 if (!mux_cfg->cfg_reg) in omap_cfg_reg()
438 return -ENODEV; in omap_cfg_reg()
440 return mux_cfg->cfg_reg(reg); in omap_cfg_reg()