38 static struct reset_control *meson_smp_get_core_reset(int cpu)  in meson_smp_get_core_reset()  argument
40 	struct device_node *np = of_get_cpu_node(cpu, 0);  in meson_smp_get_core_reset()
45 static void meson_smp_set_cpu_ctrl(int cpu, bool on_off)  in meson_smp_set_cpu_ctrl()  argument
50 		val |= BIT(cpu);  in meson_smp_set_cpu_ctrl()
52 		val &= ~BIT(cpu);  in meson_smp_set_cpu_ctrl()
116 static void meson_smp_begin_secondary_boot(unsigned int cpu)  in meson_smp_begin_secondary_boot()  argument
125 	       sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu));  in meson_smp_begin_secondary_boot()
131 	scu_cpu_power_enable(scu_base, cpu);  in meson_smp_begin_secondary_boot()
134 static int meson_smp_finalize_secondary_boot(unsigned int cpu)  in meson_smp_finalize_secondary_boot()  argument
139 	while (readl(sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu))) {  in meson_smp_finalize_secondary_boot()
142 			       cpu);  in meson_smp_finalize_secondary_boot()
148 	       sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu));  in meson_smp_finalize_secondary_boot()
150 	meson_smp_set_cpu_ctrl(cpu, true);  in meson_smp_finalize_secondary_boot()
155 static int meson8_smp_boot_secondary(unsigned int cpu,  in meson8_smp_boot_secondary()  argument
161 	rstc = meson_smp_get_core_reset(cpu);  in meson8_smp_boot_secondary()
163 		pr_err("Couldn't get the reset controller for CPU%d\n", cpu);  in meson8_smp_boot_secondary()
167 	meson_smp_begin_secondary_boot(cpu);  in meson8_smp_boot_secondary()
172 		pr_err("Failed to assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
178 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0);  in meson8_smp_boot_secondary()
180 		pr_err("Couldn't wake up CPU%d\n", cpu);  in meson8_smp_boot_secondary()
187 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8_smp_boot_secondary()
190 		pr_err("Error when disabling isolation of CPU%d\n", cpu);  in meson8_smp_boot_secondary()
197 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
201 	ret = meson_smp_finalize_secondary_boot(cpu);  in meson8_smp_boot_secondary()
211 static int meson8b_smp_boot_secondary(unsigned int cpu,  in meson8b_smp_boot_secondary()  argument
218 	rstc = meson_smp_get_core_reset(cpu);  in meson8b_smp_boot_secondary()
220 		pr_err("Couldn't get the reset controller for CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
224 	meson_smp_begin_secondary_boot(cpu);  in meson8b_smp_boot_secondary()
228 				 MESON_CPU_PWR_A9_CNTL0_M(cpu), 0);  in meson8b_smp_boot_secondary()
230 		pr_err("Couldn't power up CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
239 		pr_err("Failed to assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
245 				 MESON_CPU_PWR_A9_MEM_PD0_M(cpu), 0);  in meson8b_smp_boot_secondary()
247 		pr_err("Couldn't power up the memory for CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
253 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0);  in meson8b_smp_boot_secondary()
255 		pr_err("Couldn't wake up CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
262 				       val & MESON_CPU_PWR_A9_CNTL1_ST(cpu),  in meson8b_smp_boot_secondary()
265 		pr_err("Timeout while polling PMU for CPU%d status\n", cpu);  in meson8b_smp_boot_secondary()
270 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8b_smp_boot_secondary()
273 		pr_err("Error when disabling isolation of CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
280 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
284 	ret = meson_smp_finalize_secondary_boot(cpu);  in meson8b_smp_boot_secondary()
295 static void meson8_smp_cpu_die(unsigned int cpu)  in meson8_smp_cpu_die()  argument
297 	meson_smp_set_cpu_ctrl(cpu, false);  in meson8_smp_cpu_die()
310 static int meson8_smp_cpu_kill(unsigned int cpu)  in meson8_smp_cpu_kill()  argument
317 		power_mode = scu_get_cpu_power_mode(scu_base, cpu);  in meson8_smp_cpu_kill()
327 		       cpu);  in meson8_smp_cpu_kill()
334 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8_smp_cpu_kill()
337 		pr_err("Error when enabling isolation for CPU%d\n", cpu);  in meson8_smp_cpu_kill()
345 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0x3);  in meson8_smp_cpu_kill()
347 		pr_err("Couldn't change sleep status of CPU%d\n", cpu);  in meson8_smp_cpu_kill()
354 static int meson8b_smp_cpu_kill(unsigned int cpu)  in meson8b_smp_cpu_kill()  argument
359 		power_mode = scu_get_cpu_power_mode(scu_base, cpu);  in meson8b_smp_cpu_kill()
369 		       cpu);  in meson8b_smp_cpu_kill()
377 				 MESON_CPU_PWR_A9_CNTL0_M(cpu), 0x3);  in meson8b_smp_cpu_kill()
379 		pr_err("Couldn't power down CPU%d\n", cpu);  in meson8b_smp_cpu_kill()
384 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8b_smp_cpu_kill()
387 		pr_err("Error when enabling isolation for CPU%d\n", cpu);  in meson8b_smp_cpu_kill()
395 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0x3);  in meson8b_smp_cpu_kill()
397 		pr_err("Couldn't change sleep status of CPU%d\n", cpu);  in meson8b_smp_cpu_kill()
403 				 MESON_CPU_PWR_A9_MEM_PD0_M(cpu), 0xf);  in meson8b_smp_cpu_kill()
405 		pr_err("Couldn't power down the memory of CPU%d\n", cpu);  in meson8b_smp_cpu_kill()