arm/mach-lpc32xx/pm.c

1 // SPDX-License-Identifier: GPL-2.0-only
3  * arch/arm/mach-lpc32xx/pm.c
12  * LPC32XX CPU and system power management
14  * The LPC32XX has three CPU modes for controlling system power: run,
15  * direct-run, and halt modes. When switching between halt and run modes,
16  * the CPU transistions through direct-run mode. For Linux, direct-run
18  * system is fully suspended.
21  * The ARM CPU clock (HCLK_PLL), HCLK bus clock, and PCLK bus clocks are
22  * derived from the HCLK PLL. The HCLK and PCLK bus rates are divided from
25  * Direct-run mode:
26  * The ARM CPU clock, HCLK bus clock, and PCLK bus clocks are driven from
32  * SYSCLK is gated off and the CPU and system clocks are halted.
35  * system event (ie, GPIO state change, RTC match, key press, etc.) will
36  * wake the system up back into direct-run mode.
40  * DRAM or regular SDRAM devices. If SDRAM is used in the system, the
41  * SDRAM will still be accessible in direct-run mode. In DDR based systems,
42  * a transition to direct-run mode will stop all DDR accesses (no clocks).
44  * and exit DRAM self-refresh modes must not be executed in DRAM. A small
51  *  Places DRAMs in self-refresh mode
52  *  Enter direct-run mode
55  *  Enter halt mode - CPU and buses will stop
56  *  System enters direct-run mode when an enabled event occurs
89 		return -ENOMEM;  in lpc32xx_pm_enter()
92 	 * Copy code to suspend system into IRAM. The suspend code  in lpc32xx_pm_enter()
126 	 * Setup SDRAM self-refresh clock to automatically disable o  in lpc32xx_pm_init()
127 	 * start of self-refresh. This only needs to be done once.  in lpc32xx_pm_init()