1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright (C)2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
20 #include "irq-common.h"
54 	unsigned int index, mask, value;  in tzic_set_irq_fiq()  local
56 	index = hwirq >> 5;  in tzic_set_irq_fiq()
57 	if (unlikely(index >= 4))  in tzic_set_irq_fiq()
58 		return -EINVAL;  in tzic_set_irq_fiq()
61 	value = imx_readl(tzic_base + TZIC_INTSEC0(index)) | mask;  in tzic_set_irq_fiq()
64 	imx_writel(value, tzic_base + TZIC_INTSEC0(index));  in tzic_set_irq_fiq()
76 	int idx = d->hwirq >> 5;  in tzic_irq_suspend()
78 	imx_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx));  in tzic_irq_suspend()
83 	int idx = d->hwirq >> 5;  in tzic_irq_resume()
107 	gc->private = &tzic_extra_irq;  in tzic_init_gc()
108 	gc->wake_enabled = IRQ_MSK(32);  in tzic_init_gc()
110 	ct = gc->chip_types;  in tzic_init_gc()
111 	ct->chip.irq_mask = irq_gc_mask_disable_reg;  in tzic_init_gc()
112 	ct->chip.irq_unmask = irq_gc_unmask_enable_reg;  in tzic_init_gc()
113 	ct->chip.irq_set_wake = irq_gc_set_wake;  in tzic_init_gc()
114 	ct->chip.irq_suspend = tzic_irq_suspend;  in tzic_init_gc()
115 	ct->chip.irq_resume = tzic_irq_resume;  in tzic_init_gc()
116 	ct->regs.disable = TZIC_ENCLEAR0(idx);  in tzic_init_gc()
117 	ct->regs.enable = TZIC_ENSET0(idx);  in tzic_init_gc()
136 				irqofs = fls(stat) - 1;  in tzic_handle_irq()
173 	/* all IRQ no FIQ Warning :: No selection */  in tzic_init_dt()
175 	irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());  in tzic_init_dt()
188 	/* Initialize FIQ */  in tzic_init_dt()
199  * tzic_enable_wake() - enable wakeup interrupt
201  * @return			0 if successful; non-zero otherwise
213 		return -EAGAIN;  in tzic_enable_wake()