1 // SPDX-License-Identifier: GPL-2.0-or-later
45  * The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit.
47  * non-cpu parts of the system.  For these reasons, imx5 should default
48  * to always using this state for cpu idling.  The PM_SUSPEND_STANDBY also
49  * uses this state and needs to take no action when registers remain configured
79 	{.offset = 0x574, .clear = MX53_DSE_HIGHZ_MASK}, /* CAS */
80 	{.offset = 0x588, .clear = MX53_DSE_HIGHZ_MASK}, /* RAS */
96 	/* Controls the CKE signal which is required to leave self refresh */
122  * suspend code(arch/arm/mach-imx/suspend-imx53.S), if this struct
124  * must be also changed accordingly otherwise, the suspend to ocram
150 	/* always allow platform to issue a deep sleep mode request */  in mx5_cpu_lp_set()
218 		return -EINVAL;  in mx5_suspend_enter()
238 	/* return registers to default idle state */  in mx5_suspend_enter()
282 	node = of_find_compatible_node(NULL, NULL, "mmio-sram");  in imx_suspend_alloc_ocram()
284 		pr_warn("%s: failed to find ocram node!\n", __func__);  in imx_suspend_alloc_ocram()
285 		return -ENODEV;  in imx_suspend_alloc_ocram()
290 		pr_warn("%s: failed to find ocram device!\n", __func__);  in imx_suspend_alloc_ocram()
291 		ret = -ENODEV;  in imx_suspend_alloc_ocram()
295 	ocram_pool = gen_pool_get(&pdev->dev, NULL);  in imx_suspend_alloc_ocram()
298 		ret = -ENODEV;  in imx_suspend_alloc_ocram()
304 		pr_warn("%s: unable to alloc ocram!\n", __func__);  in imx_suspend_alloc_ocram()
305 		ret = -ENOMEM;  in imx_suspend_alloc_ocram()
317 	put_device(&pdev->dev);  in imx_suspend_alloc_ocram()
328 	/* Need this to avoid compile error due to const typeof in fncpy.h */  in imx5_suspend_init()
329 	void (*suspend_asm)(void __iomem *) = soc_data->suspend_asm;  in imx5_suspend_init()
334 	if (!soc_data->suspend_asm_sz || !*soc_data->suspend_asm_sz)  in imx5_suspend_init()
335 		return -EINVAL;  in imx5_suspend_init()
338 		*soc_data->suspend_asm_sz + sizeof(*suspend_info),  in imx5_suspend_init()
345 	suspend_info->io_count = soc_data->suspend_io_count;  in imx5_suspend_init()
346 	memcpy(suspend_info->io_state, soc_data->suspend_io_config,  in imx5_suspend_init()
347 	       sizeof(*suspend_info->io_state) * soc_data->suspend_io_count);  in imx5_suspend_init()
349 	suspend_info->m4if_base = ioremap(soc_data->m4if_addr, SZ_16K);  in imx5_suspend_init()
350 	if (!suspend_info->m4if_base) {  in imx5_suspend_init()
351 		ret = -ENOMEM;  in imx5_suspend_init()
355 	suspend_info->iomuxc_base = ioremap(soc_data->iomuxc_addr, SZ_16K);  in imx5_suspend_init()
356 	if (!suspend_info->iomuxc_base) {  in imx5_suspend_init()
357 		ret = -ENOMEM;  in imx5_suspend_init()
364 		*soc_data->suspend_asm_sz);  in imx5_suspend_init()
369 	iounmap(suspend_info->m4if_base);  in imx5_suspend_init()
389 	ccm_base = ioremap(data->ccm_addr, SZ_16K);  in imx5_pm_common_init()
390 	cortex_base = ioremap(data->cortex_addr, SZ_16K);  in imx5_pm_common_init()
391 	gpc_base = ioremap(data->gpc_addr, SZ_16K);  in imx5_pm_common_init()
394 	/* Set the registers to the default cpu idle state. */  in imx5_pm_common_init()