Lines Matching +full:0 +full:x644
29 0x8000 | MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW); in ksz9021rn_phy_fixup()
30 phy_write(phydev, MICREL_KSZ9021_EXTREG_DATA_WRITE, 0x0000); in ksz9021rn_phy_fixup()
34 0x8000 | MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW); in ksz9021rn_phy_fixup()
35 phy_write(phydev, MICREL_KSZ9021_EXTREG_DATA_WRITE, 0xf0f0); in ksz9021rn_phy_fixup()
40 return 0; in ksz9021rn_phy_fixup()
54 if (dev->devfn != 0) in ventana_pciesw_early_fixup()
57 pci_read_config_dword(dev, 0x62c, &dw); in ventana_pciesw_early_fixup()
58 dw |= 0xaaa8; // GPIO1-7 outputs in ventana_pciesw_early_fixup()
59 pci_write_config_dword(dev, 0x62c, dw); in ventana_pciesw_early_fixup()
61 pci_read_config_dword(dev, 0x644, &dw); in ventana_pciesw_early_fixup()
62 dw |= 0xfe; // GPIO1-7 output high in ventana_pciesw_early_fixup()
63 pci_write_config_dword(dev, 0x644, dw); in ventana_pciesw_early_fixup()
67 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
68 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
69 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
159 (0xf << 16) | (0x7 << 20)); in imx6q_axi_init()
163 (0xf << 16) | (0x7 << 20)); in imx6q_axi_init()
174 * Quirk: i.MX6QP revision = i.MX6Q revision - (1, 0), in imx6q_init_machine()
177 imx_print_silicon_rev("i.MX6QP", imx_get_soc_revision() - 0x10); in imx6q_init_machine()
205 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6q_init_late()
232 .l2c_aux_val = 0,
233 .l2c_aux_mask = ~0,