Lines Matching +full:pll +full:- +full:reset +full:- +full:mode

1 /* SPDX-License-Identifier: GPL-2.0-only */
37  * 	r3: contains virtual base DDR2 PLL controller
41 	stmfd	sp!, {r0-r12, lr}		@ save registers on stack
46 	ldmia	r0, {r0-r4}
49 	 * Switch DDR to self-refresh mode.
77 	/* Put the DDR PLL in bypass and power down */
83 	/* Wait for PLL to switch to bypass */
88        /* Power down the PLL */
106 	/* initialize the DDR PLL controller */
108 	/* Put PLL in reset */
113 	/* Clear PLL power down */
122        /* Bring PLL out of reset */
127 	/* Wait for PLL to lock (assume prediv = 1, 25MHz OSCIN) */
132        /* Remove PLL from bypass mode */
163 	ldmfd   sp!, {r0-r12, pc}
215 	.word	. - davinci_cpu_suspend