Lines Matching +full:master +full:- +full:side
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-at91/pm_slow_clock.S
13 #include "pm_data-offsets.h"
16 .arch armv7-a
28 * Wait until master clock is ready (after switching master clock source)
30 * @r_mckid: register holding master clock identifier
32 * Side effects: overwrites r7, r8
49 * Wait until master oscillator has stabilized.
51 * Side effects: overwrites r7
62 * Side effects: overwrites r7
73 * Side effects: overwrites r7
92 * @ena: 0 - disable regulator
93 * 1 - enable regulator
95 * Side effects: overwrites r7, r8, r9, r10
125 * Enable self-refresh
127 * Side effects: overwrites r2, r3, tmp1, tmp2, tmp3, r7
164 /* Switch to self-refresh. */
170 /* Wait for self-refresh enter. */
176 /* Disable DX DLLs for non-backup modes. */
214 * Disable self-refresh
216 * Side effects: overwrites r2, r3, tmp1, tmp2, tmp3
248 /* Enable quasi-dynamic programming. */
252 /* De-assert SDRAM initialization. */
257 /* Quasi-dynamic programming done. */
266 /* DLL soft-reset + DLL lock wait + ITM reset */
277 /* Enable quasi-dynamic programming. */
296 /* Trigger self-refresh exit. */
302 /* Wait for self-refresh exit done. */
333 * Enable self-refresh
347 /* Active SDRAM self-refresh mode */
360 /* LPDDR1 --> force DDR2 mode during self-refresh */
370 /* Active DDRC self-refresh mode */
391 /* Active DDRC self-refresh mode */
405 /* Active SDRAMC self-refresh mode */
419 * Disable self-refresh
438 * For exiting the self-refresh mode, do nothing,
439 * automatically exit the self-refresh mode.
590 /* Switch the main clock source to 12-MHz RC oscillator */
606 /* Switch the master clock source to main clock */
636 /* Switch the master clock source to slow clock */
652 /* Switch the master clock source to main clock */
819 * Side effects: overwrites tmp1, tmp2
875 * Side effects: overwrites tmp1, tmp2
936 /* Save Master clock setting */
941 * Set master clock source to:
942 * - MAINCK if using ULP0 fast variant
943 * - slow clock, otherwise
980 * Restore master clock setting
993 /* Switch the master clock source to slow clock. */
1026 /* at91_pm_suspend_in_sram must be 8-byte aligned per the requirements of fncpy() */
1030 stmfd sp!, {r4 - r12, lr}
1051 * to RAM may be limited while in self-refresh.
1086 /* Active the self-refresh mode */
1108 /* Exit the self-refresh mode */
1112 ldmfd sp!, {r4 - r12, pc}
1161 .word .-at91_pm_suspend_in_sram