Lines Matching +full:long +full:- +full:ram +full:- +full:code

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2008-2009 ST-Ericsson AB
41 .name = "DTCM RAM",
48 .name = "ITCM RAM",
77 unsigned long vaddr; in tcm_alloc()
95 gen_pool_free(tcm_pool, (unsigned long) addr, len); in tcm_free()
114 const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128, in setup_tcm_bank()
115 256, 512, 1024, -1, -1, -1, -1 }; in setup_tcm_bank()
141 return -EINVAL; in setup_tcm_bank()
145 return -EINVAL; in setup_tcm_bank()
183 * When we are running in the non-secure world and the secure world
200 * In this particular case (MRC with ARM condition code ALways) the
201 * Thumb-2 and ARM instruction encoding are identical, so this hook
202 * will work on a Thumb-2 kernel.
205 * T1/A1 for the bit-by-bit details.
209 * | | | | | | | +---- opc2 0|1 = 000|001
210 * | | | | | | +------- CRm 0 = 0001
211 * | | | | | +----------- CRn 0 = 1001
212 * | | | | +--------------- Rt ? = ????
213 * | | | +------------------- opc1 0 = 000
214 * | | +----------------------- coproc 15 = 1111
215 * | +-------------------------- condition ALways = 1110
216 * +----------------------------- instruction MRC = 1110
222 * [ ] [ ] [ ]| [ ] [ ] [ ] [ ]| +--- CRm
223 * | | | | | | | | +----- SBO
224 * | | | | | | | +------- opc2
225 * | | | | | | +----------- coproc
226 * | | | | | +---------------- Rt
227 * | | | | +--------------------- CRn
228 * | | | +------------------------- SBO
229 * | | +--------------------------- opc1
230 * | +------------------------------- instruction
231 * +------------------------------------ condition
240 regs->uregs[(instr >> DEST_REG_SHIFT) & DEST_REG_MASK] = 0; in tcm_handler()
241 regs->ARM_pc += 4; in tcm_handler()
261 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; in tcm_init()
262 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; in tcm_init()
265 char *ram; in tcm_init() local
276 "ITCM code compiled in, but no TCM present " in tcm_init()
277 "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz); in tcm_init()
284 * This code only supports v6-compatible TCMTR implementations. in tcm_init()
307 /* This means you compiled more code than fits into DTCM */ in tcm_init()
308 if (dtcm_code_sz > (dtcm_end - DTCM_OFFSET)) { in tcm_init()
309 pr_info("CPU DTCM: %u bytes of code compiled to " in tcm_init()
311 dtcm_code_sz, (dtcm_end - DTCM_OFFSET)); in tcm_init()
318 if (!(dtcm_end - DTCM_OFFSET)) in tcm_init()
320 dtcm_res.end = dtcm_end - 1; in tcm_init()
322 dtcm_iomap[0].length = dtcm_end - DTCM_OFFSET; in tcm_init()
324 /* Copy data from RAM to DTCM */ in tcm_init()
327 ram = &__dtcm_start; in tcm_init()
328 memcpy(start, ram, dtcm_code_sz); in tcm_init()
329 pr_debug("CPU DTCM: copied data from %p - %p\n", in tcm_init()
333 pr_info("CPU DTCM: %u bytes of code compiled to DTCM but no " in tcm_init()
345 /* This means you compiled more code than fits into ITCM */ in tcm_init()
346 if (itcm_code_sz > (itcm_end - ITCM_OFFSET)) { in tcm_init()
347 pr_info("CPU ITCM: %u bytes of code compiled to " in tcm_init()
349 itcm_code_sz, (itcm_end - ITCM_OFFSET)); in tcm_init()
356 if (!(itcm_end - ITCM_OFFSET)) in tcm_init()
358 itcm_res.end = itcm_end - 1; in tcm_init()
360 itcm_iomap[0].length = itcm_end - ITCM_OFFSET; in tcm_init()
362 /* Copy code from RAM to ITCM */ in tcm_init()
365 ram = &__itcm_start; in tcm_init()
366 memcpy(start, ram, itcm_code_sz); in tcm_init()
367 pr_debug("CPU ITCM: copied code from %p - %p\n", in tcm_init()
371 pr_info("CPU ITCM: %u bytes of code compiled to ITCM but no " in tcm_init()
395 tcm_pool = gen_pool_create(2, -1); in setup_tcm_pool()
403 dtcm_end - dtcm_pool_start, -1); in setup_tcm_pool()
411 dtcm_end - dtcm_pool_start, in setup_tcm_pool()
420 itcm_end - itcm_pool_start, -1); in setup_tcm_pool()
428 itcm_end - itcm_pool_start, in setup_tcm_pool()