Lines Matching +full:1 +full:c0
21 adds \tmp, \addr, #\size - 1
33 sub \tmp, \limit, #1
34 subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr
35 addhs \tmp, \tmp, #1 @ if (tmp >= 0) {
44 .macro uaccess_disable, tmp, isb=1
50 mcr p15, 0, \tmp, c3, c0, 0 @ Set domain register
56 .macro uaccess_enable, tmp, isb=1
62 mcr p15, 0, \tmp, c3, c0, 0
70 .macro uaccess_disable, tmp, isb=1
72 * Disable TTBR0 page table walks (EDP0 = 1), use the reserved ASID
73 * from TTBR1 (A1 = 1) and enable TTBR1 page table walks for kernel
76 mrc p15, 0, \tmp, c2, c0, 2 @ read TTBCR
79 mcr p15, 0, \tmp, c2, c0, 2 @ write TTBCR
85 .macro uaccess_enable, tmp, isb=1
90 mrc p15, 0, \tmp, c2, c0, 2 @ read TTBCR
93 mcr p15, 0, \tmp, c2, c0, 2 @ write TTBCR
101 .macro uaccess_disable, tmp, isb=1
104 .macro uaccess_enable, tmp, isb=1
132 DACR( mrc p15, 0, \tmp0, c3, c0, 0)
134 PAN( mrc p15, 0, \tmp0, c2, c0, 2)
139 mcr p15, 0, \tmp2, c3, c0, 0
145 mcr p15, 0, \tmp2, c3, c0, 0
153 DACR( mcr p15, 0, \tmp0, c3, c0, 0)
155 PAN( mcr p15, 0, \tmp0, c2, c0, 2)