Lines Matching +full:4 +full:- +full:31
2 @ SPDX-License-Identifier: GPL-2.0
23 @ Size/performance trade-off
28 @ armv4-small 392/+29% 1958/+64% 2250/+96%
29 @ armv4-compact 740/+89% 1552/+26% 1840/+22%
30 @ armv4-large 1420/+92% 1307/+19% 1370/+34%[***]
31 @ full unroll ~5100/+260% ~1260/+4% ~1300/+5%
42 @ i-cache availability, branch penalties, etc.
49 @ [***] which is also ~35% better than compiler generated code. Dual-
55 @ Rescheduling for dual-issue pipeline resulted in 13% improvement on
61 @ Profiler-assisted and platform-specific optimization resulted in 10%
70 stmdb sp!,{r4-r12,lr}
76 sub sp,sp,#15*4
86 ldrb r12,[r1],#4
93 ldr r9,[r1],#4 @ handles unaligned
104 str r9,[r14,#-4]!
111 ldrb r12,[r1],#4
118 ldr r9,[r1],#4 @ handles unaligned
129 str r9,[r14,#-4]!
136 ldrb r12,[r1],#4
143 ldr r9,[r1],#4 @ handles unaligned
154 str r9,[r14,#-4]!
161 ldrb r12,[r1],#4
168 ldr r9,[r1],#4 @ handles unaligned
179 str r9,[r14,#-4]!
186 ldrb r12,[r1],#4
193 ldr r9,[r1],#4 @ handles unaligned
204 str r9,[r14,#-4]!
207 bne .L_00_15 @ [((11+4)*5+2)*3]
208 sub sp,sp,#25*4
214 ldrb r12,[r1],#4
221 ldr r9,[r1],#4 @ handles unaligned
232 str r9,[r14,#-4]!
234 ldr r9,[r14,#15*4]
235 ldr r10,[r14,#13*4]
236 ldr r11,[r14,#7*4]
238 ldr r12,[r14,#2*4]
242 mov r9,r9,ror#31
244 eor r9,r9,r11,ror#31
245 str r9,[r14,#-4]!
251 ldr r9,[r14,#15*4]
252 ldr r10,[r14,#13*4]
253 ldr r11,[r14,#7*4]
255 ldr r12,[r14,#2*4]
259 mov r9,r9,ror#31
261 eor r9,r9,r11,ror#31
262 str r9,[r14,#-4]!
268 ldr r9,[r14,#15*4]
269 ldr r10,[r14,#13*4]
270 ldr r11,[r14,#7*4]
272 ldr r12,[r14,#2*4]
276 mov r9,r9,ror#31
278 eor r9,r9,r11,ror#31
279 str r9,[r14,#-4]!
285 ldr r9,[r14,#15*4]
286 ldr r10,[r14,#13*4]
287 ldr r11,[r14,#7*4]
289 ldr r12,[r14,#2*4]
293 mov r9,r9,ror#31
295 eor r9,r9,r11,ror#31
296 str r9,[r14,#-4]!
303 ldr r8,.LK_20_39 @ [+15+16*4]
306 ldr r9,[r14,#15*4]
307 ldr r10,[r14,#13*4]
308 ldr r11,[r14,#7*4]
310 ldr r12,[r14,#2*4]
314 mov r9,r9,ror#31
316 eor r9,r9,r11,ror#31
317 str r9,[r14,#-4]!
322 ldr r9,[r14,#15*4]
323 ldr r10,[r14,#13*4]
324 ldr r11,[r14,#7*4]
326 ldr r12,[r14,#2*4]
330 mov r9,r9,ror#31
332 eor r9,r9,r11,ror#31
333 str r9,[r14,#-4]!
338 ldr r9,[r14,#15*4]
339 ldr r10,[r14,#13*4]
340 ldr r11,[r14,#7*4]
342 ldr r12,[r14,#2*4]
346 mov r9,r9,ror#31
348 eor r9,r9,r11,ror#31
349 str r9,[r14,#-4]!
354 ldr r9,[r14,#15*4]
355 ldr r10,[r14,#13*4]
356 ldr r11,[r14,#7*4]
358 ldr r12,[r14,#2*4]
362 mov r9,r9,ror#31
364 eor r9,r9,r11,ror#31
365 str r9,[r14,#-4]!
370 ldr r9,[r14,#15*4]
371 ldr r10,[r14,#13*4]
372 ldr r11,[r14,#7*4]
374 ldr r12,[r14,#2*4]
378 mov r9,r9,ror#31
380 eor r9,r9,r11,ror#31
381 str r9,[r14,#-4]!
389 bne .L_20_39_or_60_79 @ [+((12+3)*5+2)*4]
390 bcs .L_done @ [+((12+3)*5+2)*4], spare 300 bytes
393 sub sp,sp,#20*4 @ [+2]
395 ldr r9,[r14,#15*4]
396 ldr r10,[r14,#13*4]
397 ldr r11,[r14,#7*4]
399 ldr r12,[r14,#2*4]
403 mov r9,r9,ror#31
405 eor r9,r9,r11,ror#31
406 str r9,[r14,#-4]!
412 ldr r9,[r14,#15*4]
413 ldr r10,[r14,#13*4]
414 ldr r11,[r14,#7*4]
416 ldr r12,[r14,#2*4]
420 mov r9,r9,ror#31
422 eor r9,r9,r11,ror#31
423 str r9,[r14,#-4]!
429 ldr r9,[r14,#15*4]
430 ldr r10,[r14,#13*4]
431 ldr r11,[r14,#7*4]
433 ldr r12,[r14,#2*4]
437 mov r9,r9,ror#31
439 eor r9,r9,r11,ror#31
440 str r9,[r14,#-4]!
446 ldr r9,[r14,#15*4]
447 ldr r10,[r14,#13*4]
448 ldr r11,[r14,#7*4]
450 ldr r12,[r14,#2*4]
454 mov r9,r9,ror#31
456 eor r9,r9,r11,ror#31
457 str r9,[r14,#-4]!
463 ldr r9,[r14,#15*4]
464 ldr r10,[r14,#13*4]
465 ldr r11,[r14,#7*4]
467 ldr r12,[r14,#2*4]
471 mov r9,r9,ror#31
473 eor r9,r9,r11,ror#31
474 str r9,[r14,#-4]!
481 bne .L_40_59 @ [+((12+5)*5+2)*4]
484 sub sp,sp,#20*4
486 b .L_20_39_or_60_79 @ [+4], spare 300 bytes
488 add sp,sp,#80*4 @ "deallocate" stack frame
499 ldmia sp!,{r4-r12,pc}