Lines Matching +full:timer +full:- +full:dsp
2 compatible = "ti,omap5-l4-abe", "simple-pm-bus";
5 reg-names = "la", "ap";
6 power-domains = <&prm_abe>;
7 /* OMAP5_L4_ABE_CLKCTRL is read-only */
8 #address-cells = <1>;
9 #size-cells = <1>;
13 compatible = "simple-pm-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
89 target-module@22000 { /* 0x40122000, ap 2 02.0 */
90 compatible = "ti,sysc-omap2", "ti,sysc";
92 reg-names = "sysc";
93 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
96 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
101 clock-names = "fck";
102 #address-cells = <1>;
103 #size-cells = <1>;
108 compatible = "ti,omap4-mcbsp";
111 reg-names = "mpu", "dma";
113 clock-names = "fck";
115 interrupt-names = "common";
116 ti,buffer-size = <128>;
119 dma-names = "tx", "rx";
124 target-module@24000 { /* 0x40124000, ap 4 04.0 */
125 compatible = "ti,sysc-omap2", "ti,sysc";
127 reg-names = "sysc";
128 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
131 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
136 clock-names = "fck";
137 #address-cells = <1>;
138 #size-cells = <1>;
143 compatible = "ti,omap4-mcbsp";
146 reg-names = "mpu", "dma";
148 clock-names = "fck";
150 interrupt-names = "common";
151 ti,buffer-size = <128>;
154 dma-names = "tx", "rx";
159 target-module@26000 { /* 0x40126000, ap 6 06.0 */
160 compatible = "ti,sysc-omap2", "ti,sysc";
162 reg-names = "sysc";
163 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
166 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
171 clock-names = "fck";
172 #address-cells = <1>;
173 #size-cells = <1>;
178 compatible = "ti,omap4-mcbsp";
181 reg-names = "mpu", "dma";
183 clock-names = "fck";
185 interrupt-names = "common";
186 ti,buffer-size = <128>;
189 dma-names = "tx", "rx";
194 target-module@28000 { /* 0x40128000, ap 8 08.0 */
197 #address-cells = <1>;
198 #size-cells = <1>;
203 target-module@2a000 { /* 0x4012a000, ap 10 0a.0 */
206 #address-cells = <1>;
207 #size-cells = <1>;
212 target-module@2e000 { /* 0x4012e000, ap 12 0c.0 */
213 compatible = "ti,sysc-omap4", "ti,sysc";
216 reg-names = "rev", "sysc";
217 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
219 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
225 clock-names = "fck";
226 #address-cells = <1>;
227 #size-cells = <1>;
232 compatible = "ti,omap4-dmic";
235 reg-names = "mpu", "dma";
238 dma-names = "up_link";
243 target-module@30000 { /* 0x40130000, ap 14 0e.0 */
246 #address-cells = <1>;
247 #size-cells = <1>;
252 mcpdm_module: target-module@32000 { /* 0x40132000, ap 16 10.0 */
253 compatible = "ti,sysc-omap4", "ti,sysc";
256 reg-names = "rev", "sysc";
257 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
259 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
265 clock-names = "fck";
266 #address-cells = <1>;
267 #size-cells = <1>;
275 compatible = "ti,omap4-mcpdm";
278 reg-names = "mpu", "dma";
282 dma-names = "up_link", "dn_link";
286 target-module@38000 { /* 0x40138000, ap 18 12.0 */
287 compatible = "ti,sysc-omap4-timer", "ti,sysc";
290 reg-names = "rev", "sysc";
291 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
293 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
299 clock-names = "fck";
300 #address-cells = <1>;
301 #size-cells = <1>;
305 timer5: timer@0 {
306 compatible = "ti,omap5430-timer";
311 clock-names = "fck", "timer_sys_ck";
313 ti,timer-dsp;
314 ti,timer-pwm;
318 target-module@3a000 { /* 0x4013a000, ap 20 14.0 */
319 compatible = "ti,sysc-omap4-timer", "ti,sysc";
322 reg-names = "rev", "sysc";
323 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
325 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
331 clock-names = "fck";
332 #address-cells = <1>;
333 #size-cells = <1>;
337 timer6: timer@0 {
338 compatible = "ti,omap5430-timer";
343 clock-names = "fck", "timer_sys_ck";
345 ti,timer-dsp;
346 ti,timer-pwm;
350 target-module@3c000 { /* 0x4013c000, ap 22 16.0 */
351 compatible = "ti,sysc-omap4-timer", "ti,sysc";
354 reg-names = "rev", "sysc";
355 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
357 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
363 clock-names = "fck";
364 #address-cells = <1>;
365 #size-cells = <1>;
369 timer7: timer@0 {
370 compatible = "ti,omap5430-timer";
375 clock-names = "fck", "timer_sys_ck";
377 ti,timer-dsp;
381 target-module@3e000 { /* 0x4013e000, ap 24 18.0 */
382 compatible = "ti,sysc-omap4-timer", "ti,sysc";
385 reg-names = "rev", "sysc";
386 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
388 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
394 clock-names = "fck";
395 #address-cells = <1>;
396 #size-cells = <1>;
400 timer8: timer@0 {
401 compatible = "ti,omap5430-timer";
406 clock-names = "fck", "timer_sys_ck";
408 ti,timer-dsp;
409 ti,timer-pwm;
413 target-module@80000 { /* 0x40180000, ap 26 1a.0 */
416 #address-cells = <1>;
417 #size-cells = <1>;
422 target-module@a0000 { /* 0x401a0000, ap 28 1c.0 */
425 #address-cells = <1>;
426 #size-cells = <1>;
431 target-module@c0000 { /* 0x401c0000, ap 30 1e.0 */
434 #address-cells = <1>;
435 #size-cells = <1>;
440 target-module@f1000 { /* 0x401f1000, ap 32 20.0 */
441 compatible = "ti,sysc-omap4", "ti,sysc";
444 reg-names = "rev", "sysc";
445 ti,sysc-midle = <SYSC_IDLE_FORCE>,
449 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
454 clock-names = "fck";
455 #address-cells = <1>;
456 #size-cells = <1>;