Lines Matching +full:omap4 +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
14 compatible = "ti,omap4430", "ti,omap4";
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
39 #address-cells = <1>;
40 #size-cells = <0>;
43 compatible = "arm,cortex-a9";
45 next-level-cache = <&L2>;
49 clock-names = "cpu";
51 clock-latency = <300000>; /* From omap-cpufreq driver */
54 compatible = "arm,cortex-a9";
56 next-level-cache = <&L2>;
63 * interconnect as simple-pm-bus probes at module_init() time.
66 compatible = "mmio-sram";
70 gic: interrupt-controller@48241000 {
71 compatible = "arm,cortex-a9-gic";
72 interrupt-controller;
73 #interrupt-cells = <3>;
76 interrupt-parent = <&gic>;
79 L2: cache-controller@48242000 {
80 compatible = "arm,pl310-cache";
82 cache-unified;
83 cache-level = <2>;
86 local-timer@48240600 {
87 compatible = "arm,cortex-a9-twd-timer";
91 interrupt-parent = <&gic>;
94 wakeupgen: interrupt-controller@48281000 {
95 compatible = "ti,omap4-wugen-mpu";
96 interrupt-controller;
97 #interrupt-cells = <3>;
99 interrupt-parent = <&gic>;
103 * XXX: Use a flat representation of the OMAP4 interconnect.
110 compatible = "simple-pm-bus";
111 power-domains = <&prm_l4per>;
115 #address-cells = <1>;
116 #size-cells = <1>;
119 l3-noc@44000000 {
120 compatible = "ti,omap4-l3-noc";
137 target-module@48210000 {
138 compatible = "ti,sysc-omap4-simple", "ti,sysc";
139 power-domains = <&prm_mpu>;
141 clock-names = "fck";
142 #address-cells = <1>;
143 #size-cells = <1>;
147 compatible = "ti,omap4-mpu";
155 target-module@50000000 {
156 compatible = "ti,sysc-omap2", "ti,sysc";
160 reg-names = "rev", "sysc", "syss";
161 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
164 ti,syss-mask = <1>;
165 ti,no-idle-on-init;
167 clock-names = "fck";
168 #address-cells = <1>;
169 #size-cells = <1>;
174 compatible = "ti,omap4430-gpmc";
176 #address-cells = <2>;
177 #size-cells = <1>;
180 dma-names = "rxtx";
181 gpmc,num-cs = <8>;
182 gpmc,num-waitpins = <4>;
184 clock-names = "fck";
185 interrupt-controller;
186 #interrupt-cells = <2>;
187 gpio-controller;
188 #gpio-cells = <2>;
192 target-module@52000000 {
193 compatible = "ti,sysc-omap4", "ti,sysc";
196 reg-names = "rev", "sysc";
197 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
198 ti,sysc-midle = <SYSC_IDLE_FORCE>,
202 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
206 ti,sysc-delay-us = <2>;
207 power-domains = <&prm_cam>;
209 clock-names = "fck";
210 #address-cells = <1>;
211 #size-cells = <1>;
223 target-module@54000000 {
224 compatible = "ti,sysc-omap4-simple", "ti,sysc";
225 power-domains = <&prm_emu>;
227 clock-names = "fck";
228 #address-cells = <1>;
229 #size-cells = <1>;
233 compatible = "arm,cortex-a9-pmu";
237 target-module@55082000 {
238 compatible = "ti,sysc-omap2", "ti,sysc";
242 reg-names = "rev", "sysc", "syss";
243 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
246 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
250 clock-names = "fck";
252 reset-names = "rstctrl";
254 #size-cells = <1>;
255 #address-cells = <1>;
258 compatible = "ti,omap4-iommu";
261 #iommu-cells = <0>;
262 ti,iommu-bus-err-back;
266 target-module@4012c000 {
267 compatible = "ti,sysc-omap4", "ti,sysc";
270 reg-names = "rev", "sysc";
271 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
272 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
277 clock-names = "fck";
278 #address-cells = <1>;
279 #size-cells = <1>;
286 target-module@4e000000 {
287 compatible = "ti,sysc-omap2", "ti,sysc";
290 reg-names = "rev", "sysc";
291 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
295 #size-cells = <1>;
296 #address-cells = <1>;
299 compatible = "ti,omap4-dmm";
305 target-module@4c000000 {
306 compatible = "ti,sysc-omap4-simple", "ti,sysc";
308 reg-names = "rev";
310 clock-names = "fck";
311 ti,no-idle;
312 #address-cells = <1>;
313 #size-cells = <1>;
317 compatible = "ti,emif-4d";
320 phy-type = <1>;
321 hw-caps-read-idle-ctrl;
322 hw-caps-ll-interface;
323 hw-caps-temp-alert;
327 target-module@4d000000 {
328 compatible = "ti,sysc-omap4-simple", "ti,sysc";
330 reg-names = "rev";
332 clock-names = "fck";
333 ti,no-idle;
334 #address-cells = <1>;
335 #size-cells = <1>;
339 compatible = "ti,emif-4d";
342 phy-type = <1>;
343 hw-caps-read-idle-ctrl;
344 hw-caps-ll-interface;
345 hw-caps-temp-alert;
350 compatible = "ti,omap4-dsp";
355 firmware-name = "omap4-dsp-fw.xe64T";
361 compatible = "ti,omap4-ipu";
363 reg-names = "l2ram";
367 firmware-name = "omap4-ipu-fw.xem3";
372 aes1_target: target-module@4b501000 {
373 compatible = "ti,sysc-omap2", "ti,sysc";
377 reg-names = "rev", "sysc", "syss";
378 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
380 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
384 ti,syss-mask = <1>;
387 clock-names = "fck";
388 #address-cells = <1>;
389 #size-cells = <1>;
393 compatible = "ti,omap4-aes";
397 dma-names = "tx", "rx";
401 aes2_target: target-module@4b701000 {
402 compatible = "ti,sysc-omap2", "ti,sysc";
406 reg-names = "rev", "sysc", "syss";
407 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
409 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
413 ti,syss-mask = <1>;
416 clock-names = "fck";
417 #address-cells = <1>;
418 #size-cells = <1>;
422 compatible = "ti,omap4-aes";
426 dma-names = "tx", "rx";
430 sham_target: target-module@4b100000 {
431 compatible = "ti,sysc-omap3-sham", "ti,sysc";
435 reg-names = "rev", "sysc", "syss";
436 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
438 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
441 ti,syss-mask = <1>;
444 clock-names = "fck";
445 #address-cells = <1>;
446 #size-cells = <1>;
450 compatible = "ti,omap4-sham";
454 dma-names = "rx";
458 abb_mpu: regulator-abb-mpu {
459 compatible = "ti,abb-v2";
460 regulator-name = "abb_mpu";
461 #address-cells = <0>;
462 #size-cells = <0>;
463 ti,tranxdone-status-mask = <0x80>;
465 ti,settling-time = <50>;
466 ti,clock-cycles = <16>;
471 abb_iva: regulator-abb-iva {
472 compatible = "ti,abb-v2";
473 regulator-name = "abb_iva";
474 #address-cells = <0>;
475 #size-cells = <0>;
476 ti,tranxdone-status-mask = <0x80000000>;
478 ti,settling-time = <50>;
479 ti,clock-cycles = <16>;
484 sgx_module: target-module@56000000 {
485 compatible = "ti,sysc-omap4", "ti,sysc";
488 reg-names = "rev", "sysc";
489 ti,sysc-midle = <SYSC_IDLE_FORCE>,
493 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
497 power-domains = <&prm_gfx>;
499 clock-names = "fck";
500 #address-cells = <1>;
501 #size-cells = <1>;
505 compatible = "ti,omap4430-gpu", "img,powervr-sgx540";
515 target-module@58000000 {
516 compatible = "ti,sysc-omap2", "ti,sysc";
519 reg-names = "rev", "syss";
520 ti,syss-mask = <1>;
521 power-domains = <&prm_dss>;
526 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
527 #address-cells = <1>;
528 #size-cells = <1>;
532 compatible = "ti,omap4-dss";
536 clock-names = "fck";
537 #address-cells = <1>;
538 #size-cells = <1>;
541 target-module@1000 {
542 compatible = "ti,sysc-omap2", "ti,sysc";
546 reg-names = "rev", "sysc", "syss";
547 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
550 ti,sysc-midle = <SYSC_IDLE_FORCE>,
553 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
557 ti,syss-mask = <1>;
560 clock-names = "fck", "sys_clk";
561 #address-cells = <1>;
562 #size-cells = <1>;
566 compatible = "ti,omap4-dispc";
570 clock-names = "fck";
574 target-module@2000 {
575 compatible = "ti,sysc-omap2", "ti,sysc";
579 reg-names = "rev", "sysc", "syss";
580 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
583 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
585 ti,syss-mask = <1>;
588 clock-names = "fck", "sys_clk";
589 #address-cells = <1>;
590 #size-cells = <1>;
597 clock-names = "fck", "ick";
601 target-module@3000 {
602 compatible = "ti,sysc-omap2", "ti,sysc";
604 reg-names = "rev";
606 clock-names = "sys_clk";
607 #address-cells = <1>;
608 #size-cells = <1>;
612 compatible = "ti,omap4-venc";
616 clock-names = "fck";
620 target-module@4000 {
621 compatible = "ti,sysc-omap2", "ti,sysc";
625 reg-names = "rev", "sysc", "syss";
626 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
629 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
633 ti,syss-mask = <1>;
634 #address-cells = <1>;
635 #size-cells = <1>;
639 compatible = "ti,omap4-dsi";
643 reg-names = "proto", "phy", "pll";
648 clock-names = "fck", "sys_clk";
650 #address-cells = <1>;
651 #size-cells = <0>;
655 target-module@5000 {
656 compatible = "ti,sysc-omap2", "ti,sysc";
660 reg-names = "rev", "sysc", "syss";
661 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
664 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
668 ti,syss-mask = <1>;
669 #address-cells = <1>;
670 #size-cells = <1>;
674 compatible = "ti,omap4-dsi";
678 reg-names = "proto", "phy", "pll";
683 clock-names = "fck", "sys_clk";
685 #address-cells = <1>;
686 #size-cells = <0>;
690 target-module@6000 {
691 compatible = "ti,sysc-omap4", "ti,sysc";
694 reg-names = "rev", "sysc";
699 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
701 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;
704 clock-names = "fck", "dss_clk";
705 #address-cells = <1>;
706 #size-cells = <1>;
710 compatible = "ti,omap4-hdmi";
715 reg-names = "wp", "pll", "phy", "core";
720 clock-names = "fck", "sys_clk";
722 dma-names = "audio_tx";
728 iva_hd_target: target-module@5a000000 {
729 compatible = "ti,sysc-omap4", "ti,sysc";
732 reg-names = "rev", "sysc";
733 ti,sysc-midle = <SYSC_IDLE_FORCE>,
736 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
739 power-domains = <&prm_ivahd>;
741 reset-names = "rstctrl";
743 clock-names = "fck";
744 #address-cells = <1>;
745 #size-cells = <1>;
756 #include "omap4-l4.dtsi"
757 #include "omap4-l4-abe.dtsi"
758 #include "omap44xx-clocks.dtsi"
762 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
764 #power-domain-cells = <0>;
768 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
770 #reset-cells = <1>;
771 #power-domain-cells = <0>;
775 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
777 #power-domain-cells = <0>;
781 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
783 #power-domain-cells = <0>;
787 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
789 #reset-cells = <1>;
790 #power-domain-cells = <0>;
794 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
796 #reset-cells = <1>;
797 #power-domain-cells = <0>;
801 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
803 #power-domain-cells = <0>;
807 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
809 #power-domain-cells = <0>;
813 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
815 #power-domain-cells = <0>;
819 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
821 #power-domain-cells = <0>;
825 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
827 #power-domain-cells = <0>;
831 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
833 #power-domain-cells = <0>;
837 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
839 #power-domain-cells = <0>;
843 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
845 #power-domain-cells = <0>;
849 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
851 #power-domain-cells = <0>;
855 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
857 #reset-cells = <1>;
861 /* Preferred always-on timer for clockevent */
863 ti,no-reset-on-init;
864 ti,no-idle;
866 assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
867 assigned-clock-parents = <&sys_32k_ck>;