Lines Matching +full:fixed +full:- +full:clock

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP34xx/OMAP36xx clock data
8 clock@a00 {
11 #clock-cells = <2>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 {
17 #clock-cells = <0>;
18 compatible = "ti,composite-no-wait-gate-clock";
19 clock-output-names = "ssi_ssr_gate_fck_3430es2";
24 clock@a40 {
27 #clock-cells = <2>;
28 #address-cells = <1>;
29 #size-cells = <0>;
31 ssi_ssr_div_fck_3430es2: clock-ssi-ssr-div-fck-3430es2@8 {
33 #clock-cells = <0>;
34 compatible = "ti,composite-divider-clock";
35 clock-output-names = "ssi_ssr_div_fck_3430es2";
42 #clock-cells = <0>;
43 compatible = "ti,composite-clock";
48 #clock-cells = <0>;
49 compatible = "fixed-factor-clock";
51 clock-mult = <1>;
52 clock-div = <2>;
55 clock@a10 {
58 #clock-cells = <2>;
59 #address-cells = <1>;
60 #size-cells = <0>;
62 hsotgusb_ick_3430es2: clock-hsotgusb-ick-3430es2@4 {
64 #clock-cells = <0>;
65 compatible = "ti,omap3-hsotgusb-interface-clock";
66 clock-output-names = "hsotgusb_ick_3430es2";
70 ssi_ick: clock-ssi-ick-3430es2@0 {
72 #clock-cells = <0>;
73 compatible = "ti,omap3-ssi-interface-clock";
74 clock-output-names = "ssi_ick_3430es2";
80 #clock-cells = <0>;
81 compatible = "fixed-factor-clock";
83 clock-mult = <1>;
84 clock-div = <1>;
87 clock@c00 {
90 #clock-cells = <2>;
91 #address-cells = <1>;
92 #size-cells = <0>;
94 usim_gate_fck: clock-usim-gate-fck@9 {
96 #clock-cells = <0>;
97 compatible = "ti,composite-gate-clock";
98 clock-output-names = "usim_gate_fck";
104 #clock-cells = <0>;
105 compatible = "fixed-factor-clock";
107 clock-mult = <1>;
108 clock-div = <2>;
112 #clock-cells = <0>;
113 compatible = "fixed-factor-clock";
115 clock-mult = <1>;
116 clock-div = <2>;
120 #clock-cells = <0>;
121 compatible = "fixed-factor-clock";
123 clock-mult = <1>;
124 clock-div = <4>;
128 #clock-cells = <0>;
129 compatible = "fixed-factor-clock";
131 clock-mult = <1>;
132 clock-div = <8>;
136 #clock-cells = <0>;
137 compatible = "fixed-factor-clock";
139 clock-mult = <1>;
140 clock-div = <10>;
144 #clock-cells = <0>;
145 compatible = "fixed-factor-clock";
147 clock-mult = <1>;
148 clock-div = <4>;
152 #clock-cells = <0>;
153 compatible = "fixed-factor-clock";
155 clock-mult = <1>;
156 clock-div = <8>;
160 #clock-cells = <0>;
161 compatible = "fixed-factor-clock";
163 clock-mult = <1>;
164 clock-div = <16>;
168 #clock-cells = <0>;
169 compatible = "fixed-factor-clock";
171 clock-mult = <1>;
172 clock-div = <20>;
175 clock@c40 {
178 #clock-cells = <2>;
179 #address-cells = <1>;
180 #size-cells = <0>;
182 usim_mux_fck: clock-usim-mux-fck@3 {
184 #clock-cells = <0>;
185 compatible = "ti,composite-mux-clock";
186 clock-output-names = "usim_mux_fck";
188 ti,index-starts-at-one;
193 #clock-cells = <0>;
194 compatible = "ti,composite-clock";
198 clock@c10 {
201 #clock-cells = <2>;
202 #address-cells = <1>;
203 #size-cells = <0>;
205 usim_ick: clock-usim-ick@9 {
207 #clock-cells = <0>;
208 compatible = "ti,omap3-interface-clock";
209 clock-output-names = "usim_ick";