Lines Matching +full:clock +full:- +full:mult

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Device Tree Source for OMAP36xx clock data
9 		#clock-cells = <0>;
10 		compatible = "ti,omap3-dpll-per-j-type-clock";
16 		#clock-cells = <0>;
17 		compatible = "ti,hsdiv-gate-clock";
19 		ti,bit-shift = <0x1e>;
21 		ti,set-rate-parent;
22 		ti,set-bit-to-disable;
26 		#clock-cells = <0>;
27 		compatible = "ti,hsdiv-gate-clock";
29 		ti,bit-shift = <0x1b>;
31 		ti,set-bit-to-disable;
35 		#clock-cells = <0>;
36 		compatible = "ti,hsdiv-gate-clock";
38 		ti,bit-shift = <0xc>;
40 		ti,set-bit-to-disable;
44 		#clock-cells = <0>;
45 		compatible = "ti,hsdiv-gate-clock";
47 		ti,bit-shift = <0x1c>;
49 		ti,set-bit-to-disable;
53 		#clock-cells = <0>;
54 		compatible = "ti,hsdiv-gate-clock";
56 		ti,bit-shift = <0x1f>;
58 		ti,set-bit-to-disable;
61 	clock@1000 {
64 		#clock-cells = <2>;
65 		#address-cells = <1>;
66 		#size-cells = <0>;
68 		uart4_fck: clock-uart4-fck@18 {
70 			#clock-cells = <0>;
71 			compatible = "ti,wait-gate-clock";
72 			clock-output-names = "uart4_fck";
79 	clock-mult = <1>;
83 	clock-mult = <1>;
87 	ti,clock-mult = <1>;
91 	ti,clock-mult = <1>;
95 	clock-mult = <1>;
118 	ti,max-div = <31>;